Abstract is missing.
- FPB: Fine-grained Power Budgeting to Improve Write Throughput of Multi-level Cell Phase Change MemoryLei Jiang, Youtao Zhang, Bruce R. Childers, Jun Yang 0002. 1-12 [doi]
- Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word AccessNiladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi Iyer. 13-24 [doi]
- Transactional Memory Architecture and Implementation for IBM System ZChristian Jacobi, Timothy J. Slegel, Dan F. Greiner. 25-36 [doi]
- Warped-DMR: Light-weight Error Detection for GPGPUHyeran Jeon, Murali Annavaram. 37-47 [doi]
- The Performance Vulnerability of Architectural and Non-architectural Arrays to Permanent FaultsDamien Hardy, Isidoros Sideris, Nikolas Ladas, Yiannakis Sazeides. 48-59 [doi]
- NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip ArchitecturesAndreas Prodromou, Andreas Panteli, Chrysostomos Nicopoulos, Yiannakis Sazeides. 60-71 [doi]
- Cache-Conscious Wavefront SchedulingTimothy G. Rogers, Mike O'Connor, Tor M. Aamodt. 72-83 [doi]
- Libra: Tailoring SIMD Execution Using Heterogeneous Hardware and Dynamic ConfigurabilityYongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott A. Mahlke. 84-95 [doi]
- Unifying Primary Cache, Scratch, and Register File Memories in a Throughput ProcessorMark Gebhart, Stephen W. Keckler, Brucek Khailany, Ronny Krashinsky, William J. Dally. 96-106 [doi]
- Kernel Weaver: Automatically Fusing Database Primitives for Efficient GPU ComputationHaicheng Wu, Gregory Frederick Diamos, Srihari Cadambi, Sudhakar Yalamanchili. 107-118 [doi]
- KnightShift: Scaling the Energy Proportionality Wall through Server-Level HeterogeneityDaniel Wong 0001, Murali Annavaram. 119-130 [doi]
- Rethinking DRAM Power Modes for Energy ProportionalityKrishna T. Malladi, Ian Shaeffer, Liji Gopalakrishnan, David Lo, Benjamin C. Lee, Mark Horowitz. 131-142 [doi]
- CoScale: Coordinating CPU and Memory System DVFS in Server SystemsQingyuan Deng, David Meisner, Abhishek Bhattacharjee, Thomas F. Wenisch, Ricardo Bianchini. 143-154 [doi]
- Predicting Performance Impact of DVFS for Realistic Memory SystemsRustam Miftakhutdinov, Eiman Ebrahimi, Yale N. Patt. 155-165 [doi]
- Vector Extensions for Decision Support DBMS AccelerationTimothy Hayes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero. 166-176 [doi]
- NOC-Out: Microarchitecting a Scale-Out ProcessorPejman Lotfi-Kamran, Boris Grot, Babak Falsafi. 177-187 [doi]
- SLICC: Self-Assembly of Instruction Cache Collectives for OLTP WorkloadsIslam Atta, Pinar Tözün, Anastasia Ailamaki, Andreas Moshovos. 188-198 [doi]
- Systematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-BenchmarksRamon Bertran, Alper Buyuktosunoglu, Meeta Sharma Gupta, Marc González, Pradip Bose. 199-211 [doi]
- AUDIT: Stress Testing the Automatic WayYoungtaek Kim, Lizy Kurian John, Sanjay Pant, Srilatha Manne, Michael J. Schulte, William Lloyd Bircher, Madhu Saravana Sibi Govindan. 212-223 [doi]
- Accurate Fine-Grained Processor Power ProxiesWei Huang, Charles Lefurgy, William Kuk, Alper Buyuktosunoglu, Michael S. Floyd, Karthick Rajamani, Malcolm Allen-Ware, Bishop Brock. 224-234 [doi]
- Fundamental Latency Trade-off in Architecting DRAM Caches: Outperforming Impractical SRAM-Tags with a Simple and Practical DesignMoinuddin K. Qureshi, Gabe H. Loh. 235-246 [doi]
- A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing DispatchJaewoong Sim, Gabriel H. Loh, Hyesoon Kim, Mike O'Connor, Mithuna Thottethodi. 247-257 [doi]
- CoLT: Coalesced Large-Reach TLBsBinh Pham, Viswanathan Vaidyanathan, Aamer Jaleel, Abhishek Bhattacharjee. 258-269 [doi]
- NoRD: Node-Router Decoupling for Effective Power-gating of On-Chip RoutersLizhong Chen, Timothy Mark Pinkston. 270-281 [doi]
- Dynamic Reconfiguration of 3D Photonic Networks-on-Chip for Maximizing Performance and Improving Fault ToleranceRandy Morris, Avinash Karanth Kodi, Ahmed Louri. 282-293 [doi]
- Addressing End-to-End Memory Access Latency in NoC-Based MulticoresAkbar Sharifi, Emre Kultursay, Mahmut T. Kandemir, Chita R. Das. 294-304 [doi]
- MorphCore: An Energy-Efficient Microarchitecture for High Performance ILP and High Throughput TLPKhubaib, M. Aater Suleman, Milad Hashemi, Chris Wilkerson, Yale N. Patt. 305-316 [doi]
- Composite Cores: Pushing Heterogeneity Into a CoreAndrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch, Scott A. Mahlke. 317-328 [doi]
- Control-Flow DecouplingRami Sheikh, James Tuck, Eric Rotenberg. 329-340 [doi]
- Spatiotemporal Coherence TrackingMohammad Alisafaee. 341-350 [doi]
- Predicting Coherence Communication by Tracking Synchronization Points at Run TimeSocrates Demetriades, Sangyeun Cho. 351-362 [doi]
- Vulcan: Hardware Support for Detecting Sequential Consistency Violations DynamicallyAbdullah Muzahid, Shanxiang Qi, Josep Torrellas. 363-375 [doi]
- Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory HierarchySnehasish Kumar, Hongzhou Zhao, Arrvindh Shriraman, Eric Matthews, Sandhya Dwarkadas, Lesley Shannon. 376-388 [doi]
- Improving Cache Management Policies Using Dynamic Reuse DistancesNam Duong, Dali Zhao, Taesu Kim, Rosario Cammarota, Mateo Valero, Alexander V. Veidenbaum. 389-400 [doi]
- Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete ProblemPetar Radojkovic, Paul M. Carpenter, Miquel Moretó, Alex Ramírez, Francisco J. Cazorla. 401-412 [doi]
- Inferred Models for Dynamic and Sparse Hardware-Software SpacesWeidan Wu, Benjamin C. Lee. 413-424 [doi]
- SMARQ: Software-Managed Alias Register Queue for Dynamic OptimizationsCheng Wang, Youfeng Wu, Hongbo Rong, Hyunchul Park. 425-436 [doi]
- Profiling Data-Dependence to Assist Parallelization: Framework, Scope, and OptimizationAlain Ketterlin, Philippe Clauss. 437-448 [doi]
- Neural Acceleration for General-Purpose Approximate ProgramsHadi Esmaeilzadeh, Adrian Sampson, Luis Ceze, Doug Burger. 449-460 [doi]
- Designing a Programmable Wire-Speed Regular-Expression Matching AcceleratorJan van Lunteren, Christoph Hagleitner, Timothy Heil, Giora Biran, Uzi Shvadron, Kubilay Atasu. 461-472 [doi]