Abstract is missing.
- TLM Based Approach for Architecture Exploration of Multicore Systems-on-ChipMona Safar, Magdy A. El-Moursy, Ashraf Salem, Mohamed AbdElSalam. 1-4 [doi]
- Achieving Glitch-Free Clock Domain Crossing Signals Using Formal Verification, Static Timing Analysis, and Sequential Equivalence CheckingKesava R. Talupuru, Sanjai Athi. 5-9 [doi]
- Reusing of Properties after Discretization of Hybrid AutomataLuigi Di Guglielmo, Franco Fummi, Graziano Pravadelli. 10-15 [doi]
- Overview on ATE Test and Debugging Methods for Asynchronous CircuitsChristoph Wolf, Steffen Zeidler, Milos Krstic, Rolf Kraemer. 16-21 [doi]
- Bounded Model Checking of Incomplete Real-time Systems Using Quantified SMT FormulasChristian Miller, Karina Gitina, Bernd Becker. 22-27 [doi]
- A Test Method for Power Management of SoC-based MicroprocessorsDaecheol You, Young-Si Hwang, Youngho Ahn, Ki-Seok Chung. 28-31 [doi]
- Overview of Applying Reachability Analysis to Verifying a Physical MicroprocessorRobert de B. Johnston, Ouiza Dahmoune. 32-37 [doi]
- Model Checker to FPGA Prototype Commmunication Bottleneck IssueO. Dahmoune, R. de B. Johnston. 38-43 [doi]
- A Unified Formal Framework for Analyzing Functional and Speed-path PropertiesOswaldo Olivo, Sandip Ray, Jayanta Bhadra, Vivekananda M. Vedula. 44-45 [doi]
- Verification Tests for MCAPIAlper Sen 0001, Etem Deniz. 46-50 [doi]
- Automatic Generation of Software-based Functional Failing Test for Speed Debug and On-silicon Timing VerificationErnesto Sánchez, Giovanni Squillero, Alberto Paolo Tonda. 51-55 [doi]
- An Efficient Overlapping Event Generation Method for Symmetric System TestingDevraj Kallappa Bakchowde, Nanda Kishore AS. 56-59 [doi]
- High Coverage Power Integrity Verification in PSO Domains Employing Distributed PSO SwitchesSergey Sofer, Asher Berkovitz, Valery Neiman. 60-64 [doi]