Abstract is missing.
- An analysis of an inexpensive memory test solutionRyan Pennucci, Ryan Jurasek, Wolfgang Hokenmaier, Lester Patrick, Jacob Bucci, Donald Labrecque, David Kinney. 1-6 [doi]
- Reducing test time with FPGA accelerators using OpenCLTimothy M. Platt, Chen Liu. 1-9 [doi]
- New testing approach using near electromagnetic field probing intending to upgrade in-circuit testing of high density PCBAsNabil El Belghiti Alaoui, Patrick Tounsi, Alexandre Boyer, Arnaud Viard. 1-8 [doi]
- Nanoscale silicon mosfet response to THz radiation for testing VLSIMichael S. Shur, John Suarez. 1-6 [doi]
- One more time! Increasing fault detection with scan shift captureHui Jiang, Fanchen Zhang, Yi Sun, Jennifer Dworak. 1-7 [doi]
- Case study on low pin count testing of industry transceiver chipImtiaz Ahmed, Subhash Baraiya, Rahul Singhal. 1-5 [doi]
- Enabling fast process variation and fault simulation through macromodelling of analog componentsMehmet Ince, Ender Yilmaz, Sule Ozev. 1-6 [doi]
- A simplified on-chip calibration method for branch-line couplerWei Jiang 0017, Guoan Wang. 1-3 [doi]