Abstract is missing.
- ClusCross: a new topology for silicon interposer-based network-on-chipHesam Shabani, Xiaochen Guo. [doi]
- Energy-efficient and high-performance NoC architecture and mapping solution for deep neural networksMd Farhadur Reza, Paul Ampadu. [doi]
- Direct-modulated optical networks for interposer systemsMohammad Reza Jokar, Lunkai Zhang, John M. Dallesasse, Frederic T. Chong, Yanjing Li. [doi]
- Flow mapping and data distribution on mesh-based deep learning acceleratorSeyedeh Yasaman Hosseini Mirmahaleh, Midia Reshadi, Hesam Shabani, Xiaochen Guo, Nader Bagherzadeh. [doi]
- BINDU: deadlock-freedom with one bubble in the networkMayank Parasar, Tushar Krishna. [doi]
- k-mer countingBiresh Kumar Joardar, Priyanka Ghosh, Partha Pratim Pande, Ananth Kalyanaraman, Sriram Krishnamoorthy. [doi]
- APEC: improved acknowledgement prioritization through erasure coding in bufferless NoCsMichael Vonbun, Adrian Schiechel, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf. [doi]
- Detection and prevention protocol for black hole attack in network-on-chipLuka Daoud, Nader Rafla. [doi]
- Distributed SDN architecture for NoC-based many-core SoCsMarcelo Ruaro, Nedison Velloso, Axel Jantsch, Fernando Gehm Moraes. [doi]
- Global and semi-global communication on Si-IFBoris Vaisband, Subramanian S. Iyer. [doi]
- Channel mapping strategies for effective protection switching in fail-operational hard real-time NoCsMax Koenen, Nguyen Anh Vu Doan, Thomas Wild, Andreas Herkersdorf. [doi]
- Multi-carrier spread-spectrum transceiver for WiNoCJoel Ortiz Sosa, Olivier Sentieys, Christian Roland, Cedric Killian. [doi]
- Approximate nanophotonic interconnectsJaechul Lee, Cédric Killian, Sébastien Le Beux, Daniel Chillet. [doi]
- UBERNoC: unified buffer power-efficient router for network-on-chipHossein Farrokhbakht, Henry Kao, Natalie D. Enright Jerger. [doi]
- CDMA-based multiple multicast communications on WiNOC for efficient parallel computingNavonil Chatterjee, Hemanta Kumar Mondal, Rodrigo Cataldo, Jean-Philippe Diguet. [doi]
- SMART++: reducing cost and improving efficiency of multi-hop bypass in NoC routersIvan Perez 0004, Enrique Vallejo 0001, Ramón Beivide. [doi]
- Analyzing networks-on-chip based deep neural networksGiuseppe Ascia, Vincenzo Catania, Salvatore Monteleone, Maurizio Palesi, Davide Patti, John Jose. [doi]
- A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFETJieqiong Du, Chien-Heng Wong, Yo-Hao Tu, Wei-Han Cho, Yilei Li, Yuan Du, Po-Tsang Huang, Sheau Jiung Lee, Mau-Chung Frank Chang. [doi]
- Ghost routers: energy-efficient asymmetric multicore processors with symmetric NoCsHyojun Son, Hanjoon Kim, Hao Wang 0011, Nam Sung Kim, John Kim. [doi]
- NoC-based DNN accelerator: a future design paradigmKun-Chih Jimmy Chen, Masoumeh Ebrahimi, Ting-Yi Wang, Yuch-Chi Yang. [doi]
- Reinforcement learning based interconnection routing for adaptive traffic optimizationSheng-Chun Kao, Chao-Han Huck Yang, Pin-Yu Chen, Xiaoli Ma, Tushar Krishna. [doi]
- Power efficient photonic network-on-chip for a scalable GPUJanibul Bashir, Khushal Sethi, Smruti R. Sarangi. [doi]
- 3D NoCs with active interposer for multi-die systemsVasil Pano, Ragh Kuttappa, Baris Taskin. [doi]