Abstract is missing.
- Maximizing yield in Near-Threshold Computing under the presence of process variationNathaniel A. Conos, Saro Meguerdichian, Sheng Wei, Miodrag Potkonjak. 1-8 [doi]
- Hardware reliability of embedded systems: Are we there yet?Bashir M. Al-Hashimi. 1 [doi]
- Design of future integrated systems: A cyber-physical systems approachRadu Marculescu. 1 [doi]
- Ultra low-power standard cell design using planar bulk CMOS in subthreshold operationMarc Pons, Jean-Luc Nagel, Daniel Séverac, Marc-Nicolas Morgan, Daniel Sigg, Pierre-François Ruedi, Christian Piguet. 9-15 [doi]
- Empirical verification of fault models for FPGAs operating in the subcritical voltage regionAlex A. Birklykke, Peter Koch, Ramjee Prasad, Lars K. Alminde, Yannick Le Moullec. 16-23 [doi]
- Variability analysis of self-timed SRAM robustnessFrank P. Burns, Abdullah Baz, Delong Shang, Alex Yakovlev. 24-31 [doi]
- A variation tolerant architecture for ultra low power multi-processor clusterDaniele Bortolotti, Davide Rossi, Andrea Bartolini, Luca Benini. 32-38 [doi]
- A learning tool MOSFET model: A stepping-stone from the square-law model to BSIM4Kjell O. Jeppson. 39-44 [doi]
- The semantic of the power intent format UPF: Consistent power modeling from system level to implementationJuergen Karmann, Wolfgang Ecker. 45-50 [doi]
- Enabling energy-aware design decisions for behavioural descriptions containing black-box IP-componentsLars Kosmann, Daniel Lorenz, Axel Reimer, Wolfgang Nebel. 51-58 [doi]
- Power contracts: A formal way towards power-closure?!Gregor Nitsche, Kim Grüttner, Wolfgang Nebel. 59-66 [doi]
- Formal system-on-chip verification: An operation-based methodology and its perspectives in low power designJoakim Urdahl, Shrinidhi Udupi, Dominik Stoffel, Wolfgang Kunz. 67-74 [doi]
- Optimizing the configuration and control of a novel human-powered energy harvesting systemVishwa Goudar, Zhi Ren, Paul Brochu, Qibing Pei, Miodrag Potkonjak. 75-82 [doi]
- Power saving policies for multipurpose WBANFilippo Casamassima, Elisabetta Farella, Luca Benini. 83-90 [doi]
- Applying of Quality of Experience to system optimisationSascha Bischoff, Andreas Hansson, Bashir M. Al-Hashimi. 91-98 [doi]
- On-line thermal emulation: How to speed-up your thermal controller designFrancesco Beneventi, Andrea Bartolini, Luca Benini. 99-106 [doi]
- Evaluating the impact of substrate on power integrity in industrial microcontrollersMarco Cazzaniga, Patrice Joubert Doriol, Emmanuel Blanc, Valentino Liberali, Davide Pandini. 107-111 [doi]
- An assessment of software lifecycle energyVasily G. Moshnyaga. 112-119 [doi]
- Design of variable latency adder based on present and transitional states predictionXinghua Yang, Fei Qiao, Chang Liu, Huazhong Yang. 120-125 [doi]
- SET propagation in micropipelinesThomas Polzer, Andreas Steininger. 126-133 [doi]
- Evaluation of hop count advantages of network-coded 2D-mesh NoCsMichael Vonbun, Stefan Wallentowitz, Michael Feilen, Walter Stechele, Andreas Herkersdorf. 134-141 [doi]
- Compiling for performance and power efficiencyEwerton Daniel de Lima, Tiago Cariolano de Souza Xavier, Anderson Faustino da Silva, Linnyer Beatrys Ruiz. 142-149 [doi]
- Reliability monitoring of digital circuits by in situ timing measurementNasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel. 150-156 [doi]
- A single built-in sensor to check pull-up and pull-down CMOS networks against transient faultsR. Possamai Bastos, F. Sill Torres, Jean-Max Dutertre, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre. 157-163 [doi]
- Metastability characterization for muller C-elementsThomas Polzer, Andreas Steininger. 164-171 [doi]
- Efficient power Intent validation using loosely-timed simulation modelsFabian Mischkalla, Wolfgang Mueller. 172-179 [doi]
- An efficient eye-diagram determination technique for multi-coupled interconnect linesJunghyun Lee, Yungseon Eo. 185-190 [doi]
- Fast and accurate power annotated simulation: Application to a many-core architectureThomas Ducroux, Germain Haugou, Vincent Risson, Pascal Vivet. 191-198 [doi]
- Methodology for Power Mode selection in FD-SOI circuits with DVFS and Dynamic Body BiasingYeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beigné, Pascal Benoit, Lionel Torres. 199-206 [doi]
- Coupled voltage and frequency control for DVFS managementMauricio Altieri, Warody Lombardi, Diego Puschini, Suzanne Lesecq. 207-214 [doi]
- Crown scheduling: Energy-efficient resource allocation, mapping and discrete frequency scaling for collections of malleable streaming tasksChristoph W. Kessler, Nicolas Melot, Patrick Eitschberger, Jörg Keller. 215-222 [doi]
- Power modeling and characterization of Graphene-based logic gatesSandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino. 223-226 [doi]
- Dynamic electrothermal macromodeling techniques for thermal-aware design of circuits and systemsAlessandro Magnani, Vincenzo d'Alessandro, Niccolò Rinaldi, Massimiliano de Magistris, Klaus Aufinger. 227-230 [doi]
- Adaptive routing and Dynamic Frequency Scaling for NoC power-performance optimizationsDavide Zoni, Jose Flich, William Fornaciari. 231-234 [doi]
- Power consumption analysis using multi-view modelingCarlos Gomez, Julien DeAntoni, Frédéric Mallet. 235-238 [doi]
- A fully standard-cell delay measurement circuit for timing variability detectionAlessandro Sassone, Massimo Petricca, Massimo Poncino, Enrico Macii. 239-242 [doi]
- Automatic implementation of low-complexity QC-LDPC encodersGeorgios Tzimpragos, Christoforos Kachris, Dimitrios Soudris, Ioannis Tomkos. 243-246 [doi]
- High level tranforms toreduce energy consumption of signal and image processing operatorsH. Ye, Lionel Lacassagne, Joël Falcou, Daniel Etiemble, L. Cabaret, O. Florent. 247-254 [doi]
- Peak power demand analysis and reduction by using battery buffers for monotonic controllersWaqaas Munawar, Jian-Jia Chen. 255-258 [doi]
- Automatic implementation of low-complexity QC-LDPC encodersGeorgios Tzimpragos, Christoforos Kachris, Dimitrios Soudris, Ioannis Tomkos. 257-260 [doi]
- Design methodology for low-power embedded microprocessorsAndrea Manuzzato, Fabio Campi, Valentino Liberali, Davide Pandini. 259-264 [doi]
- A framework with temperature-aware accuracy levels for battery modeling from datasheetsMassimo Petricca, Donghwa Shin, Alberto Bocca, Alberto Macii, Enrico Macii, Massimo Poncino. 265-268 [doi]