Abstract is missing.
- The Rapid Prototyping of Application Specific Signal Processors (RASSP) program: overview and statusMark A. Richards. 1-6 [doi]
- Rapid prototyping of a real-time video encoderMarc Engels, Teresa H. Y. Meng. 8-15 [doi]
- Using an FPGA based computer as a hardware emulator for built-in self-test structuresRichard W. Wieler, Zaifu Zhang, Robert D. McLeod. 16-21 [doi]
- A reconfigurable DSP board based on CORDIC elementsEvaggelinos P. Mariatos, Michael K. Birbas, Alexios N. Birbas. 22-25 [doi]
- Rapid prototype of an SIMD processor array (using FPGA's)David L. Andrews, Andrew Wheeler, Barry Wealand, Cliff Kancler. 28-33 [doi]
- A real-time test-bed for prototyping cell-based communication networksC. Papadopoulos, Alex Maniatopoulos, Theodore Antonakopoulos, Vassilios Makios. 34-39 [doi]
- ProTR: a tool for real-time systems developmentGlaucia D. F. Azevedo, Helio Azevedo, Mario Jino. 42-51 [doi]
- An integrated framework for rapid system prototyping and automatic code distributionWilliam El Kaim, Fabrice Kordon. 52-61 [doi]
- Experience with RAPID prototypesDanny Dolev, Ray Strong, Ed Wimmers. 62-72 [doi]
- An approach for hardware-software codesignTarek Ben Ismail, Mohamed Abid, Kevin O'Brien, Ahmed Amine Jerraya. 73-80 [doi]
- Rapid development of signal processors and the RASSP programCory S. Myers, Paul D. Fiore, J. P. Letellier. 82-89 [doi]
- Geometric parallelism and cyclo-static data flow in GRAPE-IIRudy Lauwereins, Piet Wauters, Marleen Adé, J. A. Peperstraete. 90-107 [doi]
- Buffer memory requirements in DSP applicationsMarleen Adé, Rudy Lauwereins, J. A. Peperstraete. 108-123 [doi]
- Hardware emulation board based on FPGAs and programmable interconnectionsW. Y. Lo, C.-S. Choy, C. F. Chan. 126-130 [doi]
- Some design issues in multi-chip FPGA implementation of DSP algorithmsArindam Saha, Rangasayee Krishnamurthy. 131-140 [doi]
- Project Spinnaker: a new generation of rapid prototyping systemMichel Courtoy. 141-144 [doi]
- Extended VHDL for the rapid prototyping of systems with synthesizable and nonsynthesizable subsystemsJohn Daniel Sterling Babcock, Apostolos Dollas. 146-152 [doi]
- From behavioral to RTL models: an approachDominique Lavenier, Roderick McConnell. 153-161 [doi]
- Quantitative design of a scalable microsystem using ALMA: the example of the dictionary machineJean-Yves Brunel, Ivan Augé, Marc Hervieu, Philippe Bourquin, Philippe Renaud. 162-165 [doi]
- Safe rapid prototyping of object-oriented database applicationsMichele Missikoff, Marco Toiati. 168-176 [doi]
- DART: an example of accelerated evolutionary developmentStephen Cross, Richard Estrada. 177-183 [doi]
- A formal approach based on the rewriting logic for prototyping distributed information systemsAmmar Attoui, Michel Schneider. 184-19 [doi]
- Algorithms and architectures to computational systems implementationLuigi Carro, Altamiro A. Suzim. 196-204 [doi]
- Accelerating the design process by using architectural synthesisPolen Kission, Hong Ding, Ahmed Amine Jerraya. 205-212 [doi]
- Rapid system prototyping in an open system environmentGary E. Fisher. 213-219 [doi]