Table of Contents

• A Hardware Design for 3D-HEVC Depth Intra Skip with Synthesized View Distortion ChangeVinicius Borges, Murilo R. Perleberg, Vladimir Afonso, Marcelo Schiavon Porto, Luciano Agostini. 1-6 [doi]
• Multiple-objective Management based on a Distributed SDN Architecture for Many-coresMarcelo Ruaro, Fernando Gehm Moraes. 1-6 [doi]
• Fractional-Order Instrumentation Amplifier Transfer Function for Control ApplicationsVassilis Alimisis, Georgios Pappas, Paul P. Sotiriadis. 1-6 [doi]
• A SystemC profiling framework to improve fixed-point hardware utilizationAlisson Linhares, Henrique Rusa, Daniel Formiga, Rodolfo Azevedo. 1-6 [doi]
• Event-Based CMOS Image Sensor with Shared DVS Module for Pixel Area ReductionTiago M. de F. Lopes, Victor R. R. de Oliveira, Fernanda D. V. R. Oliveira, José Gabriel Rodríguez Carneiro Gomes. 1-6 [doi]
• Implementation of Asynchronous Pipelines with QDI Template onto FPGAs Using Commercial ToolsDuarte L. Oliveira, Gabriel C. Duarte, Nicolly N. M. Cardoso, Gracieth Cavalcanti Batista. 1-5 [doi]
• Modeling and Optimization of a Microprobe Detector for Area and Yield ImprovementAlessandro Girardi, Helmut Graeb. 1-6 [doi]
• Synthesis and Optimization of Majority Expressions through a Mathematical ModelEvandro C. Ferraz, José V. O. Júnior, Ian A. Grout, Alexandre C. R. da Silva. 1-6 [doi]
• A Machine Learning Approach to Accelerating DSE of Reconfigurable Accelerator SystemsAlba Sandyra Bezerra Lopes, Monica Magalhães Pereira. 1-6 [doi]
• A CMOS Analog Two-Layer Full Signal Range Cellular Neural Network for Image FilteringFabian Souza de Andrade, Ana Isabela Araújo Cunha, Edson Pinto Santana, Ygor Oliveira da Guarda Souza. 1-6 [doi]
• Design Space Exploration of a Reconfigurable Accelerator in a Heterogeneous MulticoreFrancisco Carlos Silva, João P. dos S. Patrocinio, Ivan Saraiva Silva, Ricardo Pezzuol Jacobi. 1-6 [doi]
• A Novel Single Propagation Path Multimode PAFávero Guilherme Santos, Bernardo Rego Barros de Almeida Leite, André Augusto Mariano. 1-6 [doi]
• Reducing NoC Energy Consumption Exploring Asynchronous End-to-end GALS CommunicationIaçanã I. Weber, Leonardo Londero de Oliveira, Everton Carara, Fernando Gehm Moraes. 1-6 [doi]
• All-digital FPGA-based RF pulsed transmitter with hardware complexity reduction techniquesNágila Ribeiro de Menezes, Hugo Daniel Hernández, Dionisio Carvalho, Wilhelmus A. M. Van Noije. 1-5 [doi]
• Directional Intra Frame Prediction Architecture with Edge Filter and Upsampling for AV1 Video CodingLuiz Neto, Marcel Moscarelli Corrêa, Daniel Palomino 0001, Luciano Agostini, Guilherme Corrêa. 1-6 [doi]
• Firefly: An Open-source Rocket-based Intermittent FrameworkHiago Rocha, Guilherme Korol, Michael Guilherme Jordan, Arthur M. Krause, Ronaldo Silveira, Caio Vieira, Philippe O. A. Navaux, Gabriel L. Nazar, Luigi Carro, Antonio Carlos Schneider Beck. 1-6 [doi]
• A Fine-grained Methodology for Accuracy-configurable and Energy-efficient Gaussian Filters DesignTalita Alves Borges, Leonardo Bandeira Soares, Cristina Meinhardt. 1-6 [doi]
• Mapping and Migration Strategies for Thermal Management in Many-Core SystemsAlzemiro Lucas da Silva, André Luís Del Mestre Martins, Fernando Gehm Moraes. 1-6 [doi]
• Low-Voltage Dynamic Comparator with Bulk-Driven Floating Inverter AmplifierBruno Canal, Hamilton Duarte Klimach, Sergio Bampi, Tiago R. Balen. 1-6 [doi]
• A Management Technique for Concurrent Access to a Reconfigurable AcceleratorRaul Silveira Silva, Guilherme Korol, Michael Guilherme Jordan, Marcelo Brandalero, Michael Hübner, Monica Magalhães Pereira, Mateus Beck Rutzig, Antonio Carlos Schneider Beck. 1-6 [doi]
• A 37 nW MOSFET-Only Voltage Reference in 0.13 μm CMOSVanessa F. de Lima, Hamilton Klimach. 1-6 [doi]
• 2PSA: An Optimized and Flexible Power-Precision Scalable AdderRoger Endrigo Carvalho Porto, Bruno Zatt, Nuno Roma, Luciano Agostini, Marcelo Schiavon Porto. 1-6 [doi]
• Hardware Accelerator for Shapelet Distance Computation in Time-Series ClassificationVictor Oliveira Costa, Carlos Gabriel de Araujo Gewehr, Julio Costella Vicenzi, Everton Alceu Carara, Leonardo Londero de Oliveira. 1-6 [doi]
• Standalone Rate-Distortion FME ArchitectureVanio Rodrigues Filho, Marcio Monteiro, Ismael Seidel, Mateus Grellert, José Luís Güntzel. 1-6 [doi]
• Evidence of a Dynamic Fault Model in the DICE Radiation-Hardened CellWilliam Souza da Cruz, Jean-Max Dutertre, Jean-Baptiste Rigaud, Guillaume Hubert. 1-6 [doi]
• Performance and Variability Trade-offs of CMOS PTAT Generator Topologies for Voltage Reference ApplicationsVanessa F. de Lima, Rodrigo Ataide, Sergio Bampi, Hamilton Klimach. 1-6 [doi]
• Maximizing Throughput-per-Joule of a Hybrid Communication Infrastructure Through a Software-Hardware based DVFS MechanismRafael Follmann Faccenda, Carlos Gabriel de Araujo Gewehr, Antonio Carlos Schneider Beck, Mateus B. Rutzig. 1-6 [doi]
• Analysis of single-module and cascade molecular analog circuits for approximate computing based on DNA Strand DisplacementPoliana A. C. Oliveira, Maria C. O. Fonte Boa, Renan A. Marks, Marcos V. Guterres, Omar P. Vilela Neto. 1-6 [doi]
• Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/OptimizationJoão Navarro, Maximiliam Luppe. 1-6 [doi]
• Evaluation of Cache-Based Memory Hierarchy for HEVC Video DecodingGarrenlus de Souza, Sergio Bampi, Arthur Cerveira, Bruno Zatt, Felipe Sampaio. 1-6 [doi]
• A 0.55-V 0.1°C-Accuracy All-CMOS Temperature Sensor for Implanted DevicesJader A. De Lima. 1-6 [doi]
• Characterization of Enclosed Layout Transistors for Analog Applications on a130nm TechnologyGustavo P. Platcheck, Guilherme S. Cardoso, Tiago R. Balen. 1-6 [doi]
• A Hardware Accelerator for the Segmentation of Hyperspectral ImagesArthur Passos, Felipe Viel, César Albenes Zeferino. 1-5 [doi]
• Unlocking the Full Potential of Heterogeneous Accelerators by Using a Hybrid Multi-Target Binary TranslatorTiago Knorst, Julio Vicenzi, Michael Guilherme Jordan, Jonathan Homercher de Almeida, Guilherme Korol, Antonio Carlos Schneider Beck, Mateus Beck Rutzig. 1-6 [doi]
• A Novel Fully Integrated ULV SC DC-DC Converter for Indoor Light Energy HarvestingLuiz A. Da Silva, Lucas Compassi Severo, Alessandro Girardi. 1-6 [doi]
• CLC-A: An Adaptive Implementation of the Column Line Code (CLC) ECCFelipe G. A. e Silva, Adahil Muniz, Jarbas Silveira, César A. M. Marcon. 1-6 [doi]
• The use of the analog wavelet filter to generate a sinusoidal signal and decompose the TEB signal into its cardiac and respiratory components in implantable cardiac pacemaker systemsGuilherme T. Leal, Sandro A. P. Haddad. 1-6 [doi]
• Energy reduction opportunities in Field-Coupled Nanocomputing AddersJoao N. C. Fiche, Marco T. D. Sousa, Jeferson F. Chaves, Marco A. Ribeiro, Leandro M. Silva, Luiz Filipe M. Vieira, Omar P. Vilela Neto. 1-6 [doi]
• Model and simulation of Warpage in packaged IC strips after Mold Array ProcessJose L. Ramirez, Ricardo T. Yoshioka, Carolina C. P. Nunes, Igor Fernandes Namba, Claudemir Coral. 1-5 [doi]
• A Straightforward Methodology for QCA Circuits DesignJulio Saraçol Domingues, Leomar Soares da Rosa, Felipe de Souza Marques. 1-6 [doi]