Table of Contents

• Artificial Neural Networks as an Alternative for Automatic Analog IC PlacementDaniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço 0003, Ricardo Martins 0003. 1-4 [doi]
• Power to the Model: Generating Energy-Aware Mixed-Signal Models using Machine LearningMartin Grabmann, Frank Feldhoff, Georg Gläser. 5-8 [doi]
• Artificial Neural Network Assisted Analog IC Sizing ToolGamze Islamoglu, Tugberk Ogulcan Çakici, Engin Afacan, Günhan Dündar. 9-12 [doi]
• Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC SizingNuno Lourenço 0003, Engin Afacan, Ricardo Martins 0003, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar. 13-16 [doi]
• Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuitsFlorent Cilici, Gildas Léger, Manuel J. Barragan, Salvador Mir, Estelle Lauga-Larroze, Sylvain Bourdel. 17-20 [doi]
• Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS processSadik Ilik, Nergiz Sahin-Solmaz, Aykut Kabaoglu, Mustafa Berke Yelten. 21-24 [doi]
• On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent EffectsRicardo Martins 0003, Nuno Lourenço 0003, Ricardo Póvoa, Nuno Horta. 25-28 [doi]
• Analog Layout Placement Based on Unit Elements and Routing Channel EstimationSherif Ahmed Mohamed, Mohamed Dessouky, Fady Atef Naguib, Soha Hamed. 29-32 [doi]
• A Structure-Based Methodology for Analog Layout GenerationYu-Hsien Chen, Hao-Yu Chi, Ling-Yen Song, Chien-Nan Jimmy Liu, Hung-Ming Chen. 33-36 [doi]
• Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nmRicardo Martins 0003, Nuno Lourenço 0003, Nuno Horta, Jun Yin, Pui-In Mak, Rui P. Martins. 37-40 [doi]
• Design, Simulation and Implementation of Very Compact Dual-band Microstrip Bandpass Filter for 4G and 5G ApplicationsYasir Ismael Abdulraheem Al-Yasir, Naser Ojaroudi Parchin, Ahmed Maan Abdulkhaleq, Khalid W. Hameed, Mohammed A. G. Al-Sadoon, Raed Abd-Alhameed. 41-44 [doi]
• Methodology for Performance Optimization in Noise- and Distortion-Canceling LNAAntonio D. Martínez-Pérez, Cecilia Gimeno, Denis Flandre, Francisco Aznar, Guillermo Royo, Carlos Sánchez-Azqueta. 45-48 [doi]
• Verilog-A based Behavioral Modeling of an FBMC TransmitterPatrick Döll, Oner Hanay, Erkan Bayram, Renato Negra. 49-52 [doi]
• New Pattern Reconfigurable Circular Disk Antenna Using Two PIN Diodes for WiMax/WiFi (IEEE 802.11a) ApplicationsYasir I. A. AI-Yasir, Naser Ojaroudi Parchin, Ali A. S. Alabdullah, Widad A. Mshwat, Atta Ullah, Raed Abd-Alhameed. 53-56 [doi]
• Synthesis of mm-Wave circuits using-EM-simulated passive structure librariesFábio Passos, Enrique Roca, R. Castro-López, Nuno Horta, Francisco V. Fernández. 57-60 [doi]
• Requirements, for Industrial Analog Faulf-SimulatorVladimir Zivkovic, Art Schaldenbrand. 61-64 [doi]
• 1 Adaptive defect simulation flow for Defect-oriented Test evaluationValentin Gutierrez, Gildas Léger. 65-68 [doi]
• Feature selection and feature design for machine learning indirect test: a tutorial reviewManuel J. Barragan, Gildas Léger. 69-72 [doi]
• Which metrics to use for RF indirect test strategy?Hassan El Badawi, Mariane Comte, Florence Azaïs, Vincent Kerzèrho, Serge Bernard, François Lefevre. 73-76 [doi]
• Post-Production Calibration of Analog/RF ICs: Recent Developments and A Fully Integrated SolutionAngelos Antonopoulos, Georgios Volanis, Yichuan Lu, Yiorgos Makris. 77-80 [doi]
• Self-Testing Analog Spiking Neuron CircuitSarah A. El-Sayed, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos. 81-84 [doi]
• Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMsEsteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza. 85-88 [doi]
• A Sparsity-Aware MOR Methodology for Fast and Accurate Timing Analysis of VLSI InterconnectsDimitrios Garyfallou, Charalampos Antoniadis, Nestor E. Evmorfopoulos, Georgios I. Stamoulis. 89-92 [doi]
• A Modeling Approach for 7nm Technology Node Area-Consuming Circuit Optimization and BeyondQiang Huo, Zhenhua Wu, Feng Zhang 0014, Ling Li. 93-96 [doi]
• Error-Free Calculation of Total Referred Noises in Electronic CircuitsSotoudeh Hamedi-Hagh. 97-100 [doi]
• Modeling of Parasitic Light Sensitivity in Global Shutter CMOS Image SensorsFederico Pace, Olivier Marcelot, Philippe Martin-Gonthier, Olivier Saint-Pé, Michel Breart de Boisanger, Rose-Marie Sauvage, Pierre Magnan. 101-104 [doi]
• Model-Based Engineering of Magnetic SensorsZsombor Lázár, Yves Bidaux, Markus Roost, Gael F. Close. 105-108 [doi]
• Wide Frequency Range Impedance Measurement of a Li- ion Prismatic Cell for Power Line Communication TechniqueArash Pake Talei, Wolfgang A. Pribyl, Günter Hofer. 109-112 [doi]
• Modeling of Low-dropout Regulator to Optimize Power Supply Rejection in System-on-Chip ApplicationsJun Tan, Ralf Sommer. 113-116 [doi]
• Wireless Power Transmission of a Smartphone by Three-dimensional Magnetic ResonanceMin-Gu Kim, Ye Rim Lee, Jun Rim Choi. 117-120 [doi]
• 3-D Maximum Power Point Searching and Tracking for Ultra Low Power RF Energy HarvestersMichele Caselli, Andrea Boni. 121-124 [doi]
• Power-Down Mode Verification for Hierarchical Analog CircuitsMaximilian Neuner, Helmut Graeb. 125-128 [doi]
• Efficient Circuit Reduction in Limited Frequency WindowsGeorge Floros, Nestor E. Evmorfopoulos, George Stamoulis. 129-132 [doi]
• Automatic Modeling of Transistor Level Circuits by Hybrid Systems with Parameter Variable MatricesAhmad Tarraf, Lars Hedrich. 133-136 [doi]
• Pseudo Expected Improvement Based-Optimization for CMOS Analog Circuit DesignNawel Drira, Mouna Kotti, Mourad Fakhfakh, Patrick Siarry, Esteban Tlelo-Cuautle. 137-140 [doi]
• A New Adaptation of Particle Swarm Optimization Applied to Modern FPGA PlacementYun Zhou, Dries Vercruyce, Dirk Stroobandt. 141-144 [doi]
• A Low-Frequency 3-Coil Inductive System for Wirelessly Powering Leadless PacemakersKrithikaa Mohanarangam, Min-Gu Kim, Jun Rim Choi. 145-148 [doi]
• Wireless Readout System Modeling for Electrodeless QCMAhmet Sari, Okan Zafer Batur, Ceyhun Kirmli. 149-152 [doi]
• Modeling and performance investigation of insulin injection pen for diabetic personsMaria-Alexandra Paun, Catherine Dehollain. 153-156 [doi]
• Will There be Light? - Simulative Prediction of Fluorescence MeasurementsFlorian Kögler, Alexander Hofmann, Georg Gläser. 157-160 [doi]
• A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal ReceiversRicardo Póvoa, António Canelas, Ricardo Martins 0003, Nuno Horta, Nuno Lourenço 0003, João Goes. 161-164 [doi]
• Design of Differential-Mode Input Filters for DC-DC Switching RegulatorsGiulia Di Capua, Nicola Femia, Kateryna Stoyka. 165-168 [doi]
• A Piecewise-Affine Inductance Model for Inductors Working in Nonlinear RegionAlberto Oliveri, Matteo Lodi, Marco Storace. 169-172 [doi]
• Sensitivity Analysis of Inductive Power Transfer Systems for Electric Vehicles Battery ChargingGiulia Di Capua, Nicola Femia, Kateryna Stoyka. 173-176 [doi]
• Realistic Cable Modeling for Low-Voltage InstallationsStefano Maranò, Yannick Maret, Matija Varga, Luca Ghezzi, Agostino Butti. 177-180 [doi]
• Analysis and Optimization of Power Supply Rejection for Power Management Unit Design in RFID Sensor applicationsJun Tan, Ralf Sommer. 181-184 [doi]
• Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio ApplicationJulian Leonhard, Marie-Minerve Louërat, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos. 185-188 [doi]
• Automated Parameter Extraction and SPICE Model Modification For Gate Enclosed MOSFETs SimulationBoris Contreras, Gladys Ducoudray, Rogelio Palomera, Carlos Bernal. 189-192 [doi]
• Exploiting LabViewFpga Socketed CLIP to Design and Implement Soft-Core Based Complex Digital Architectures on PXI FPGA Target BoardsLuca Dello Sterpaio, Antonino Marino, Pietro Nannipieri, Luca Fanucci. 193-196 [doi]
• TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor LevelP. Saraza-Canflanca, Javier Diaz-Fortuny, R. Castro-López, Elisenda Roca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández. 197-200 [doi]
• Identification of EMI Induced Changes During the Design of ICs using a Post-Processing FrameworkDominik Zupan, Bernd Deutschmann. 201-204 [doi]
• A new Method for the Analysis of Radiation-induced Effects in 3D VLSI Face-to-Back LUTsLuca Sterpone, Ludovica Bozzoli, Corrado De Sio, Boyang Du, Sarah Azimi. 205-208 [doi]
• A Fluctuation Model of a Hf02 RRAM Cell for Memory Circuit DesignsFeng Zhang, Linan Li, Qiang Huo, Cong Fang, Wenqiang Ba. 209-212 [doi]
• Long-Term Reliability Management For Multitasking GPGPUsZeyu Sun, Tacyoung Kim, Marcus Chow, Shaoyi Peng, Han Zhou, Hyoseung Kim, Daniel Wong 0001, Sheldon X.-D. Tan. 213-216 [doi]
• Dynamic Reliability Management for Multi-Core Processor Based on Deep Reinforcement LearningZeyu Sun, Han Zhou, Sheldon X.-D. Tan. 217-220 [doi]
• Parasitic Extraction Methodology for MEMS Sensors with Active DevicesAxel Hald, Robert Wolf, Johannes Seelhorst, Jürgen Scheible, Jens Lienig, Stefan Tibus, Mike Schwarz. 221-224 [doi]
• Efficient Design and Layout of Capacitive 3D AccelerometerSteffen Michael, Ralf Sommer. 225-228 [doi]
• Experimental Characterization of Time-Dependent Variability in Ring OscillatorsJ. Nuñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández. 229-232 [doi]
• Charge-Based Model for Reliability Analysis Flow of Flip- Flops under Process Variation and AgingMaike Taddiken, Steffen Paul, Dagmar Peters-Drolshagen. 233-236 [doi]
• Modeling the Dependencies between Circuit and Technology Parameters for Sensitivity Analysis using Machine Learning TechniquesElena-Diana Sandru, Corneliu Burileanu, Emilian David, Andi Buzo, Georg Pelz. 237-240 [doi]
• An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit BlocksP. Martín-Lloret, J. Nuñez, Elisenda Roca, Rafael Castro-López, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Francisco V. Fernández. 241-244 [doi]
• Post-Silicon Validation of Yield-Aware Analog Circuit SynthesisEngin Afacan, Gönenç Berkol, Günhan Dündar. 245-248 [doi]
• Noise leakage suppression in VCO-based ∑Δ-modulators excited by modulated signalsDries Peumans, Piet Bronders, Gerd Vandersteen. 249-252 [doi]
• Symbolic Top-down Design Methodology of a Quadrature Bandpass Delta Sigma ModulatorOner Hanay, Renato Negra. 253-256 [doi]
• PLL Real Number Modeling in SystemVerilogMina Louis, Mohamed Dessouky, Ashraf Salem. 257-260 [doi]
• Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital ConverterElisa Sacco, Johan Vergauwen, Georges G. E. Gielen. 261-264 [doi]
• Modeling Power Supply Noise Effects for System-Level Simulation of $\Delta\Sigma$ -ADCsJonas Meier, Fabian Speicher, Christoph Beyerstedt, Tobias Saalfeld, Gregor Boronowsky, Ralf Wunderlich, Stefan Heinen. 265-268 [doi]
• Spiral Generation And Its Implication On Automatic Bi-Terminal Devices Circuits DrawingCristian E. Onete, Maria Cristina C. Onete. 269-272 [doi]
• Simulation Comparison of Frequency Estimation Methods Applied for Power Control in Renewable Energy SystemsJózef Borkowski, Dariusz Kania. 273-276 [doi]
• A Reliable and Fast ANN Based Behavioral Modeling Approach for GaN HEMTAhmad Khusro, Saddam Husain, Mohammad S. Hashmi, Medet Auyuneur, Abdul Quaiyum Ansari. 277-280 [doi]
• Baseband Equivalent Modelling Approach for Analog Linear Transfer Functions in Event-driven SimulationsChristoph Beyerstedt, Fabian Speicher, Jonas Meier, Ralf Wunderlich, Stefan Heinen. 281-284 [doi]
• Hard and Soft Constraints for Multi-objective Analog IC Sizing OptimizationNuno Lourenço 0003, Ricardo Martins 0003, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye. 285-288 [doi]
• FPGA Based Modelling of an ADPLL NetworkC. Dooley, Elena Blokhina, B. Mulkeen, Dimitri Galayko. 289-292 [doi]
• Self-improvement of OPAmp parameters using Q-LearningNobukazu Takai, Masafumi Fukuda, Masahiro Saruta. 293-296 [doi]