Table of Contents

• Circuit Synthesis of a 140-220 GHz Low-Noise Amplifier in 130 nm SiGe BiCMOSDavid Bierbuesse, Florian Dietrich, Eduard Heidebrecht, Renato Negra. 1-4 [doi]
• Application of New Metal-Oxide Memristor Models in Digital and Analog Electronic CircuitsStoyan M. Kirilov, Valeri M. Mladenov. 1-4 [doi]
• Investigating synchronization phenomena in chaotic ring oscillators coupled through memristive devicesRafailia-Eleni Karamani, Iosif-Angelos Fyrigos, Georgios Ch. Sirakoulis. 1-4 [doi]
• Extending C/ID Methodology for Optimal Implementation of Single-Stage Discrete-Time AmplifiersSakthidasan Kalidasan, Armin Tajalli. 1-4 [doi]
• A Test Module for Aging Characterization of Digital CircuitsJose M. Gata-Romero, Andrés Santana-Andreo, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández 0001. 1-4 [doi]
• Single-Electron-Transistor Compact Model for Spin-Qubit ReadoutSamantha Van Rijs, Ilke Ercan, Andrei Vladimirescu, Fabio Sebastiano. 1-4 [doi]
• Strategies for parameter extraction of the time constant distribution of time-dependent variability models for nanometer-scale devicesFrancisco V. Fernández 0001, Elisenda Roca, Pablo Saraza-Canflanca, Javier Martín-Martínez, Rosana Rodríguez, Montserrat Nafría, Rafael Castro-López. 1-4 [doi]
• Design of Low Power & Low Noise On-Chip BioAmplifier in Cooperation with Analog IC Synthesis at 130nm Skywater TechnologyEnes Saglican, Berkay Dur, Engin Afacan. 1-4 [doi]
• Multiscale modelling of MEMS based Pirani gaugesPrafullkrishna Dani, Jochen Franz, Joachim Knoch. 1-4 [doi]
• Power Losses Analysis of SiC MOSFETs in DC-DC Converters with High-Ripple-Current InductorsNicola Femia, Hamidreza Jafarian, Giulia Di Capua. 1-4 [doi]
• Reinforcement Learning for Analog Sizing OptimizationMichel Chevalier, Severin Trochut, Roberto Guizzetti, Pascal Urard, Lioua Labrak, John Samuel 0003, Remy Cellier, Nacer Abouchi. 1-4 [doi]
• Multiprogram tools for FPGA boards with single identifier on WindowsA. Naya-Forcano, Miguel Garcia-Bosque, Guillermo Díez-Señorans, Santiago Celma. 1-4 [doi]
• Jitter Modeling for High Precision Frequency Measurements in Oscillator CircuitsUtku Arda Akinci, Muhammed Salih Inneci, Zeynep Duygu Sütgöl, Faik Baskaya, Günhan Dündar. 1-4 [doi]
• Paving the Way for the Electronic Design Automation of Power Management UnitsCarlos Santos, Jorge R. Fernandes, Marcelino B. Santos, Ricardo Martins. 1-4 [doi]
• Single-Inductor Dual-Output DC-DC Converter with Multiple Flying CapacitorsHale Yilmaz, Kemal Ozanoglu, Pier Cavallini, Metin Yazgi. 1-4 [doi]
• Long-Term Aging Impacts on Spatial On-Chip Power Density and TemperatureSachin Sachdeva, Jinwei Zhang, Hussam Amrouch, Sheldon X.-D. Tan. 1-4 [doi]
• Multitasking and Memcomputing in Memristor Cellular Nonlinear Networks: Insights into the Underlying MechanismsIoannis Messaris, Alon Ascoli, Dimitrios Prousalis, Vasileios G. Ntinas, Ahmet Samil Demirkol, Ronald Tetzlaff. 1-4 [doi]
• Ultra-Low Current Sensing from Femtoampere to Picoampere RangeUygar Yildiz, Eren Uzun, Kemal Ozanoglu, Günhan Dündar. 1-4 [doi]
• End-to-End Multi-Target Verification Environment for a RISC-V MicroprocessorAleksi Korsman, Verneri Hirvonen, Otto Simola, Antti Tarkka, Marko Kosunen, Jussi Ryynänen. 1-4 [doi]
• Shunt-Shunt Feedback Inverter Transimpedance Amplifier Design for Capsule EndoscopyEmrah Peker, Onur Ferhanoglu, Mustafa Berke Yelten. 1-4 [doi]
• Modeling the Avalanche Breakdown of the FMMT417 NPN BJT in the TINA EnvironmentMert Yetkin, Mustafa Berke Yelten. 1-4 [doi]
• Reliability evaluation of IC Ring Oscillator PUFsJose M. Gata-Romero, Elisenda Roca, Juan Núñez 0002, Rafael Castro-López, Francisco V. Fernández 0001. 1-4 [doi]
• Img2Sim-V2: A CAD Tool for User-Independent Simulation of Circuits in Image FormatHasan Berat Gurbuz, Abdurrahim Balta, Tugba Dalyan, Y. Daghan Gokdel, Engin Afacan. 1-4 [doi]
• Time based architecture for high-side current sensor with integrated shunt resistorFrancesco Borgioli, Roberto Pio Baorda, Paolo Angelini. 1-4 [doi]
• Under Cover: On-FPGA Coverage Monitoring by Netlist InstrumentationManuel Jirsak, Henning Siemen, Jonas Lienke, Martin Grabmann, Eric Schäfer, Georg Gläser. 1-4 [doi]
• Electromigration Stress Analysis with Rational Krylov-based Approximation of Matrix ExponentialPavlos Stoikos, George Floros 0002, Dimitrios Garyfallou, Nestor E. Evmorfopoulos, Georgios I. Stamoulis. 1-4 [doi]
• Synthesizable ADPLL Generator: From Specification to GDSKyumin Kwon, David D. Wentzloff. 1-4 [doi]
• PROTON - A Python Framework for Physics-Based Electromigration Assessment on Contemporary VLSI Power GridsOlympia Axelou, Eleni Tselepi, George Floros 0002, Nestor E. Evmorfopoulos, Georgios I. Stamoulis. 1-4 [doi]
• Exploitation of Subharmonic Injection Locking for Solving Combinatorial Optimization Problems with Coupled Oscillators using VO2 based devicesJuan Núñez 0002, Maria J. Avedillo, Manuel Jiménez. 1-4 [doi]
• Novel Control Flow Checking Implementations for Automotive SoftwareFrancesco Cosimi, Jacopo Sini, Antonio Arena, Massimo Violante. 1-4 [doi]
• Modelling Memristive Devices via Ideal Memristor and Nonlinear ResistorsFernando Corinto. 1-4 [doi]
• Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing ClosureLomash Chandra Acharya, Anubhav Kumar, Khoirom Johnson Singh, Neha Gupta, Nayakanti Sai Shabarish, Neeraj Mishra, Mahipal Dargupally, Arvind Kumar Sharma, Venkatraman Ramakrishnan, Ajoy Mandal, Sudeb Dasgupta, Anand Bulusu. 1-4 [doi]
• A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit SimulationVasileios G. Ntinas, Dharmik Patel, Yongmin Wang, Ioannis Messaris, Vikas Rana, Stephan Menzel, Alon Ascoli, Ronald Tetzlaff. 1-4 [doi]
• Maximum Output Power Point Tracking for Low Power Photovoltaic Energy Harvesting SystemsL. Vicente-García, Óscar Pereira-Rial, P. López. 1-4 [doi]
• Graphene field-effect transistor TCAD tool for circuit design under freewareFrancisco Pasadas, Anibal Pacheco-Sanchez, Nikolaos Mavredakis, David Jiménez. 1-4 [doi]
• RapidIP - Fast & Universal Synthesis of RF-CircuitsDavid Bierbuesse, Florian Dietrich, Eduard Heidebrecht, Renato Negra. 1-4 [doi]
• Design Strategies to Select the Best Locations in a Ring Oscillator PUFRaúl Aparicio-Téllez, Miguel Garcia-Bosque, Guillermo Díez-Señorans, Carlos Sánchez-Azqueta, Santiago Celma. 1-4 [doi]
• Stability Analysis for Frequency Tunable Bandpass Delta-Sigma ADC ArchitecturesJesko Flemming, Bernhard Wicht, Pascal Witte. 1-4 [doi]
• Low-Gm CMOS Transconductors with Wide Tuning Range for Bioimpedance SpectroscopyIsrael Corbacho, Juan M. Carrillo, José L. Ausín, Miguel Angel Domínguez, Raquel Pérez-Aloe, J. Francisco Duque-Carrillo. 1-4 [doi]
• A 432 MHz Class-D Power Amplifier with 60% Power Efficiency for Wireless Capsule EndoscopyFerhat Öztürk, Onur Ferhanoglu, Mustafa Berke Yelten. 1-4 [doi]
• Improving the Functional Coverage Closure of Network-on-Chip using Particle Swarm OptimizationN. Vamshi Krishna, Aruna, Soumya J.. 1-4 [doi]
• GaN Power Transistors Behavioral ModelingGiulia Di Capua, Nicola Femia. 1-4 [doi]
• High-Performance SET Hardening Technique for Vision-Oriented ApplicationsCorrado De Sio, Luca Sterpone. 1-4 [doi]
• PyXEL: Exploring Bitstream Analysis to Assess and Enhance the Robustness of Designs on FPGAsCorrado De Sio, Sarah Azimi, Luca Sterpone, David Merodio Codinachs, Filomena Decuzzi. 1-4 [doi]
• Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG SignalsRafael Vieira, Ricardo Martins 0003, Nuno Horta, Nuno Lourenço 0003. 1-4 [doi]
• Design considerations for a CMOS 65-nm RTN-based PUFEros Camacho-Ruiz, F. J. Rubio-Barbero, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández 0001. 1-4 [doi]
• Extraction of ECG features with spiking neurons for decreased power consumption in embedded devicesZonglong Li, Laurie E. Calvet. 1-4 [doi]
• A Procedural Generator for the Sizing and Physical Synthesis of a MOSFET Low-Side DriverDavid Demiri, Giovanni Capodivacca, Daniele Privato, Husni Habal, Florian Renneke. 1-4 [doi]
• Uniformity Adjustment of Delay-Based Physical Unclonable Function: Modeling and AnalysisHadis Takaloo, Majid Ahmadi, Arash Ahmadi. 1-4 [doi]
• An Overview of the Optimization of RF Power Amplifiers using a Bayesian Algorithm : (Invited)Jialin Cai, Jia Guo, Yan Qu. 1-4 [doi]
• Comparative Evaluation of Multiline TRL and 2X-Thru De-Embedding Implementation Methods on Printed Circuit Board MeasurementsTugçe Ayraç, Anil Özdemirli, Emre Apaydin, Kemal Ozanoglu, Metin Yazgi. 1-4 [doi]
• Shut Off! - Hybrid BICMOS Logic for Power-Efficient High Speed CircuitsChristoph W. Wagner, Niklas Bräunlich, Kevin E. Drenkhahn, Georg Gläser. 1-4 [doi]
• Programmable Switched-Capacitor Filter Design Tool for Biomedical Signal AcquisitionKerem Kaya, Kemal Ozanoglu, Yasemin P. Kahya, Günhan Dündar. 1-4 [doi]
• Framework to Simulate and Analyse the Electromagnetic Emission of Integrated Circuits under Electromagnetic InterferenceDominik Zupan, Daniel Kircher, Nikolaus Czepl, Bernd Deutschmann. 1-4 [doi]
• A Novel Area Efficient Inductorless Super-Regenerative Receiver Front-End for Medical Brain ImplantsNaci Pekcokguler, Günhan Dündar, Catherine Dehollain. 1-4 [doi]
• A detailed, cell-by-cell look into the effects of aging on an SRAM PUF using a specialized test arrayAndrés Santana-Andreo, Pablo Saraza-Canflanca, Héctor Carrasco-Lopez, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández 0001. 1-4 [doi]
• Formal Verification of Divider Circuits by Hardware ReductionAtif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski. 1-4 [doi]
• Hot Fuzz: Assisting verification by fuzz testing microelectronic hardwareHenning Siemen, Jonas Lienke, Georg Gläser. 1-4 [doi]
• Layout Synthesis of Analog Primitive Cells with Variational AutoencoderPo-Chun Wang, Mark Po-Hung Lin, Chien-Nan Jimmy Liu, Hung-Ming Chen. 1-4 [doi]
• A Programmable Circuit Based on the Combination of VTM Cellular CrossbarsFarzad Mozafari, Majid Ahmadi, Arash Ahmadi. 1-4 [doi]
• A Frequency-Domain Neural-Network Model for High-Power RF TransistorsJoão Louro, Luis C. Nunes, Filipe M. Barradas, José Carlos Pedro. 1-4 [doi]
• An ANN-Based Approach to the Modelling and Simulation of Analogue CircuitsAndré Amaral, António Gusmão 0001, Rafael Vieira, Ricardo Martins 0003, Nuno Horta, Nuno Lourenço 0003. 1-4 [doi]
• The True Cost of Errors in Emerging Memory Devices: A Worst-Case Analysis of Device Errors in IMC for Safety-Critical ApplicationsAlptekin Vardar, Li Zhang, Saiyam Bherulal Jain, Shaown Mojumder, Nellie Laleni, Sourav De, Thomas Kämpfe. 1-4 [doi]
• NVSystolic: Heterogeneous Simulation Framework for Emerging Memories with Systolic ArrayJ. Chithambara Moorthii, Sufyan Khan, Manan Suri. 1-4 [doi]
• Towards the Automated RF Power Amplifier DesignCatarina Belchior, Luis C. Nunes, Pedro M. Cabral, José Carlos Pedro. 1-4 [doi]
• Modelling and Optimization of a Mixed-Signal Accelerator for Deep Neural NetworksMichele Caselli, Andrea Boni. 1-4 [doi]
• Design and Implementation of a GPU-Based Digital Predistortion Linearizer for RF Power AmplifiersWantao Li, Gabriel Montoro, Pere Lluís Gilabert. 1-4 [doi]
• Analysis of SAR ADC Performance Under Radiation ExposureAtakan Türker, Kemal Ozanoglu, Engin Afacan, Günhan Dündar. 1-4 [doi]
• A Design Methodology of MMIC Power Amplifiers Using AI-driven Design TechniquesLiyuan Xue, Haijun Fan, Yuan Ding, Bo Liu. 1-4 [doi]
• A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design MethodologyFábio Passos, Nuno Lourenço 0003, Luís Mendes, Ricardo Martins 0003, João Caldinhas Vaz, Nuno Horta. 1-4 [doi]
• A Peak Detect & Hold circuit to measure and exploit RTN in a 65-nm CMOS PUFF. J. Rubio-Barbero, Eros Camacho-Ruiz, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández 0001. 1-4 [doi]
• High-Performance Wideband 0.25 μm GaAs pHEMT 6-Bit Digital Phase Shifter Design for C-Band Phased Array ApplicationsOrkun Altay Genç, Adnan Gündel, Mustafa Berke Yelten. 1-4 [doi]
• An Automated Framework for Switched-Capacitor Power Amplifier Implementation Verified in 65 nm CMOSLi-Yu Chen, David D. Wentzloff. 1-4 [doi]
• Wide-Band Shared LNA for Large Scale Neural Recording ApplicationsAlessandro Fava, Francesco Centurelli, Andrea Vittimberga, Giuseppe Scotti. 1-4 [doi]
• Design Flow to Develop Wideband Inverter-Based Circuits Using C/ID MethodologyBehdad Jamadi, Fariborz T. Ordubadi, Armin Tajalli. 1-4 [doi]