Abstract is missing.
- Reducing router's area in NoC by changing buffering method while providing QoSMahboobeh Shariat, Nima Azizibabani. 1-5 [doi]
- Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unitGian-Carlo Cardarilli, Luca Di Nunzio, Rocco Fazzolari, Marco Re. 6-11 [doi]
- SES-based framework for fault-tolerant systemsMichael Steindl, Jürgen Mottok, Hans Meier. 12-16 [doi]
- Sensors in trading process: A Stress - Aware TraderJavier Martínez Fernández, Ralf Seepold, Juan Carlos Augusto, Natividad Martínez Madrid. 17-22 [doi]
- Opening information of low capacity embedded systems for Smart SpacesJussi Kiljander, Matti Eteläperä, Janne Takalo-Mattila, Juha-Pekka Soininen. 23-28 [doi]
- A gateway-based solution for remote accessing to residential UPnP services networksJesús Sáez Gómez-Escalonilla, Julio Ángel Cano Romero, Natividad Martínez Madrid, Ralf Seepold. 29-34 [doi]
- Verification of behavioral compatibility in the Virtual Integration methodologyMichael Schorer, Stefan Kuntz, Jürgen Mottok. 35-42 [doi]
- A comprehensive development guide for network embedded systemsApostolos Meliones. 43-48 [doi]
- Using a prioritized MAC protocol to execute the database operation join in networked embedded computer systemsBjörn Andersson, Nuno Pereira, Eduardo Tovar, Filipe Pacheco. 49-54 [doi]
- Performance analysis of JPEG 2000 over 802.15.4 wireless image sensor networkPieretti Andrea, Cristiano Scavongelli, Simone Orcioni, Massimo Conti. 55-60 [doi]
- From C to VM-targeted executables: Techniques for heterogeneous sensor/actuator networksAleksander Pruszkowski, Tomasz Paczesny, Jaroslaw Domaszewicz. 61-66 [doi]
- A novel command generation method with variable feedrate utilizing FGPA for motor drivesUlas Yaman, Melik Dolen, A. Bugra Koku. 67-72 [doi]
- Selecting appropriate calibration points for an ultra low area 8-bit subrange ADCNikos Petrellis, Michael K. Birbas, John C. Kikidis, Alexios N. Birbas. 73-78 [doi]
- DC-AC power converter using sigma-delta modulationRocco D. d'Aparo, Giorgio Crostella, Davide Nicoletti, Simone Orcioni, Massimo Conti. 79-84 [doi]
- Design refinement for the development of an audio dynamic range controllerAlessio Ercole De Stephanis, Massimo Conti, Marco Caldari, Franco Ripa. 85-90 [doi]
- Current characterisation for ultra low power wireless body area networksFabio Di Franco, Christos Tachtatzis, Ben Graham, Marek Bykowski, David C. Tracey, Nick F. Timmons, Jim Morrison. 91-96 [doi]
- Minimizing power consumption in wireless sensor networks by duty-cycled reconfigurable sensor electronicsKai Lutz, Andreas König. 97-102 [doi]
- Development and implementation of a Network Processor Architecture in reconfigurable logic (FPGA)Constantinos Stefanatos, Ioannis Papaefstathiou, Charalampos Manifavas. 103-107 [doi]
- Hardware support for dynamic scheduling in multiprocessor Operating SystemBhuvana Kakunoori, Sreekumar Choyar Madathil. 108-113 [doi]