Andrzej Pulka - researchr alias

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Viewing Publication 1 - 19 from 19

2023

Validation of Task Scheduling Techniques in Multithread Time Predictable SystemsErnest Antolak, Andrzej Pulka. access, 11:46979-46997, 2023. [doi]

2021

Energy-Efficient Task Scheduling in Design of Multithread Time Predictable Real-Time SystemsErnest Antolak, Andrzej Pulka. access, 9:121111-121127, 2021. [doi]

2020

Flexible hardware approach to multi-core time-predictable systems design based on the interleaved pipeline processingErnest Antolak, Andrzej Pulka. iet-cds, 14(5):648-659, 2020. [doi]

Digitally programmable modified current differencing transconductance amplifier in 40-nm technology: design flow, parameter analyses and applicationsAndrzej Malcher, Adam Kristof, Andrzej Pulka. iet-cds, 14(8):1272-1282, 2020. [doi]

2016

PrefaceAndrzej Pulka. mam, 44:1, 2016. [doi]

2014

Selection of search strategies for solving 3-SAT problemsAndrzej Pulka. amcs, 24(2):283-297, 2014. [doi]

2013

Analysis of timing resources for highly predictable real-time systems modelsLukasz Golly, Andrzej Pulka. mixdes 2013: 497-502 [doi]

2012

Dynamic rescheduling of tasks in time predictable embedded systemsAndrzej Pulka, Adam Milik. pdes 2012: 305-310 [doi]

2011

Automatic implementation of arithmetic operation in reconfigurable logic controllersAdam Milik, Andrzej Pulka. ecctd 2011: 721-724 [doi]

2010

On efficient implementation of search algorithm for genome patternsAdam Milik, Andrzej Pulka. pdes 2010: 22-27 [doi]

2009

The reconfigurable hardware accelerator for searching genome patternsAdam Milik, Andrzej Pulka. pdes 2009: 33-38 [doi]

Multithread RISC architecture based on programmable interleaved pipeliningAndrzej Pulka, Adam Milik. icecsys 2009: 647-650 [doi]

A heterogenous approach to symbolic calculations based on structural numbersAndrzej Pulka, Lukasz Golly. icecsys 2009: 163-166 [doi]

2008

VEST - An Intelligent Tool for Timing SoCs Verification Using UML Timing DiagramsAndrzej Pulka, Adam Milik. fdl 2008: 118-123 [doi]

2007

Common HDL-Matlab Simulation EnvironmentAdam Milik, Andrzej Pulka. fdl 2007: 68-73 [doi]

A Heuristic Fault Dictionary Reduction MethodologyAndrzej Pulka. icecsys 2007: 1115-1118 [doi]

A common-sense based approach to the automated test-point selection in fault diagnosisAndrzej Pulka, Jerzy Rutkowski. ecctd 2007: 838-841 [doi]

2006

SystemC models generation based on libraries of templatesAndrzej Pulka. iscas 2006: [doi]

1999

Experiences with Modeling of Analog and Mixed A/D Systems Based on PWL TechniqueJerzy Dabrowski, Andrzej Pulka. date 1999: 790-791 [doi]

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