Majid Sarrafzadeh - researchr alias

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Zohreh Karimi, Majid Sarrafzadeh. Power aware placement for FPGAs with dual supply voltages. isqed 2009: 522-526 [doi]
Navid Amini, Jerrid E. Matthews, Foad Dabiri, Alireza Vahdatpour, Hyduke Noshadi, Majid Sarrafzadeh. A Wireless Embedded Device for Personalized Ultraviolet Monitoring. biostec 2009: 220-225
Maryam Moazeni, Alex A. T. Bui, Majid Sarrafzadeh. Accelerating total variation regularization for matrix-valued images on GPUs. cf 2009: 137-146 [doi]

Soheil Ghiasi, Elaheh Bozorgzadeh, Karlene Nguyen, Majid Sarrafzadeh. Efficient Timing Budget Management for Accuracy Improvement in a Collaborative Object Tracking System. vlsisp, 42(1):43-55, 2006. [doi]
Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh. Layout driven data communication optimization for high level synthesis. date 2006: 1185-1190 [doi]
Soheil Ghiasi, Elaheh Bozorgzadeh, Po-Kuan Huang, Roozbeh Jafari, Majid Sarrafzadeh. A Unified Theory of Timing Budget Management. tcad, 25(11):2364-2375, 2006. [doi]
Ani Nahapetian, Foad Dabiri, Majid Sarrafzadeh. Energy Minimization and Reliability for Wearable Medical Applications. icppw 2006: 309-318 [doi]
Majid Sarrafzadeh, Foad Dabiri, Roozbeh Jafari, Tammara Massey, Ani Nahapetian. Low power light-weight embedded systems. islped 2006: 207-212 [doi]
Taraneh Taghavi, Soheil Ghiasi, Majid Sarrafzadeh. Routing algorithms: architecture driven rerouting enhancement for FPGAs. iscas 2006: [doi]
Philip Brisk, Foad Dabiri, Roozbeh Jafari, Majid Sarrafzadeh. Optimal register sharing for high-level synthesis of SSA form programs. tcad, 25(5):772-779, 2006. [doi]
Majid Sarrafzadeh, Foad Dabiri, Ani Nahapetian. General Delay Budgeting on Directed Acyclic Graphs with Applications in CAD. endm, 27:95-96, 2006. [doi]
Roozbeh Jafari, Hyduke Noshadi, Majid Sarrafzadeh, Soheil Ghiasi. Adaptive Medical Feature Extraction for Resource Constrained Distributed Embedded Systems. percom 2006: 506-511 [doi]
Taraneh Taghavi, Xiaojian Yang, Bo-Kyung Choi, Maogang Wang, Majid Sarrafzadeh. Dragon2006: blockage-aware congestion-controlling mixed-size placer. ispd 2006: 209-211 [doi]
Roozbeh Jafari, Hyduke Noshadi, Soheil Ghiasi, Majid Sarrafzadeh. Adaptive Electrocardiogram Feature Extraction on Distributed Embedded Systems. tpds, 17(8):797-807, 2006. [doi]

Soheil Ghiasi, Hyun J. Moon, Ani Nahapetian, Majid Sarrafzadeh. Collaborative and Reconfigurable Object Tracking. tjs, 30(3):213-238, 2004. [doi]
Taraneh Taghavi, Soheil Ghiasi, Abhishek Ranjan, Salil Raje, Majid Sarrafzadeh. Innovate or perish: FPGA physical design. ispd 2004: 148-155 [doi]
Bo-Kyung Choi, Charles Chiang, Jamil Kawa, Majid Sarrafzadeh. Routing resources consumption on M-arch and X-arch. iscas 2004: 73-76
Eren Kursun, Soheil Ghiasi, Majid Sarrafzadeh. Transistor Level Budgeting for Power Optimization. isqed 2004: 116-121 [doi]
Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh. Instruction Selection for Compilers that Target Architectures with Echo Instructions. scopes 2004: 229-243 [doi]
Elaheh Bozorgzadeh, Seda Ogrenci Memik, Xiaojian Yang, Majid Sarrafzadeh. Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs. jcsc, 13(1):77-100, 2004. [doi]
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh. Incremental Timing Budget Management in Programmable Systems. ersa 2004: 240-246
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh. Optimal integer delay-budget assignment on directed acyclic graphs. tcad, 23(8):1184-1199, 2004. [doi]
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh. Area-efficient instruction set synthesis for reconfigurable system-on-chip designs. dac 2004: 395-400 [doi]
Soheil Ghiasi, Elaheh Bozorgzadeh, Siddharth Choudhuri, Majid Sarrafzadeh. A unified theory of timing budget management. iccad 2004: 653-659 [doi]
Soheil Ghiasi, Ani Nahapetian, Majid Sarrafzadeh. An optimal algorithm for minimizing run-time reconfiguration delay. tecs, 3(2):237-256, 2004. [doi]
Ankur Srivastava, Ryan Kastner, Chunhong Chen, Majid Sarrafzadeh. Timing driven gate duplication. tvlsi, 12(1):42-51, 2004.

Chunhong Chen, Changjun Kang, Majid Sarrafzadeh. Activity-sensitive clock tree construction for low power. islped 2002: 279-282 [doi]
Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh. Instruction generation and regularity extraction for reconfigurable processors. cases 2002: 262-269 [doi]
Majid Sarrafzadeh, Rajeev Jayaraman. Guest editorial. todaes, 7(4):499-500, 2002. [doi]
Ankur Srivastava, Majid Sarrafzadeh. Predictability: Definition, Analysis and Optimization. iwls 2002: 267-272
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh. Routability driven white space allocation for fixed-die standard-cell placement. ispd 2002: 42-47 [doi]
Chunhong Chen, Elaheh Bozorgzadeh, Ankur Srivastava, Majid Sarrafzadeh. Budget Management with Applications. algorithmica, 34(3):261-275, 2002. [doi]
Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh. Early evaluation techniques for low power binding. islped 2002: 160-165 [doi]
Chunhong Chen, Xiaojian Yang, Majid Sarrafzadeh. Predicting potential performance for digital circuits. tcad, 21(3):253-262, 2002. [doi]
Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh. Pattern routing: use and theory for increasing predictability andavoiding coupling. tcad, 21(7):777-790, 2002. [doi]
Ryan Kastner, Christina Hsieh, Miodrag Potkonjak, Majid Sarrafzadeh. On the Sensitivity of Incremental Algorithms for Combinatorial Auctions. wecwis 2002: 81-88 [doi]
Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh. Congestion estimation during top-down placement. tcad, 21(1):72-80, 2002. [doi]
Ankur Srivastava, Eren Kursun, Majid Sarrafzadeh. Predictability in RT-Level Designs. jcsc, 11(4):323-332, 2002. [doi]
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh. Timing-driven placement using design hierarchy guided constraint generation. iccad 2002: 177-180 [doi]
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh. A Standard-Cell Placement Tool for Designs with High Row Utilization. iccd 2002: 45 [doi]
Chunhong Chen, Majid Sarrafzadeh. Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis. date 2002: 1016-1020 [doi]
Ankur Srivastava, Majid Sarrafzadeh. Predictability: definition, ananlysis and optimization. iccad 2002: 118-121 [doi]

Nancy Nettleton, Wolfgang Roethig, D. Hill, Majid Sarrafzadeh. Differences in ASIC, COT and processor design (panel). ispd 2001: 2 [doi]
Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh. Congestion Reduction During Placement Based on Integer Programming. iccad 2001: 573-576 [doi]
Abhishek Ranjan, Kia Bazargan, S. Ogrenci, Majid Sarrafzadeh. Fast floorplanning for effective prediction and construction. tvlsi, 9(2):341-351, 2001. [doi]
Chunhong Chen, Ankur Srivastava, Majid Sarrafzadeh. On gate level power optimization using dual-supply voltages. tvlsi, 9(5):616-629, 2001. [doi]
Kia Bazargan, Seda Ogrenci, Majid Sarrafzadeh. Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures. dac 2001: 635-640 [doi]
Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh. Congestion estimation during top-down placement. ispd 2001: 164-169 [doi]
Majid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava. Design and analysis of physical design algorithms. ispd 2001: 82-89 [doi]
Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh. Creating and Exploiting Flexibility in Steiner Trees. dac 2001: 195-198 [doi]
Ankur Srivastava, Chunhong Chen, Majid Sarrafzadeh. Timing driven gate duplication in technology independent phase. aspdac 2001: 577-582 [doi]
Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutzer, Majid Sarrafzadeh. A Quick Safari Through the Reconfiguration Jungle. dac 2001: 172-177 [doi]
Xiaojian Yang, Elaheh Bozorgzadeh, Majid Sarrafzadeh. Wirelength estimation based on rent exponents of partitioning and placement. slip 2001: 25-31 [doi]
Amir H. Farrahi, Chunhong Chen, Ankur Srivastava, Gustavo E. Téllez, Majid Sarrafzadeh. Activity-driven clock design. tcad, 20(6):705-714, 2001. [doi]
Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh. On the complexity of gate duplication. tcad, 20(9):1170-1176, 2001. [doi]
Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh. A Super-Scheduler for Embedded Reconfigurable Systems. iccad 2001: 391 [doi]
Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh. An exact algorithm for coupling-free routing. ispd 2001: 10-15 [doi]
Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh. RPack: routability-driven packing for cluster-based FPGAs. aspdac 2001: 629-634 [doi]
Abhishek Ranjan, Ankur Srivastava, V. Karnam, Majid Sarrafzadeh. Layout aware retiming. glvlsi 2001: 25-30 [doi]
Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh. Instruction Generation for Hybrid Reconfigurable Systems. iccad 2001: 127 [doi]

Melvin A. Breuer, Majid Sarrafzadeh, Fabio Somenzi. Fundamental CAD algorithms. tcad, 19(12):1449-1475, 2000. [doi]
Chunhong Chen, Majid Sarrafzadeh. Power reduction by simultaneous voltage scaling and gate sizing. aspdac 2000: 333-338 [doi]
Maogang Wang, Xiaojian Yang, Majid Sarrafzadeh. Congestion minimization during placement. tcad, 19(10):1140-1148, 2000. [doi]
Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh. Predictable Routing. iccad 2000: 110-113
Olivier Coudert, Jason Cong, Sharad Malik, Majid Sarrafzadeh. Incremental CAD. iccad 2000: 236-243
Maogang Wang, Sung Lim, Jason Cong, Majid Sarrafzadeh. Multi-way partitioning using bi-partition heuristics. aspdac 2000: 667 [doi]
Maogang Wang, Xiaojian Yang, Majid Sarrafzadeh. DRAGON2000: Standard-Cell Placement Tool for Large Industry Circuits. iccad 2000: 260-263
Maogang Wang, Xiaojian Yang, Kenneth Eguro, Majid Sarrafzadeh. Multi-center congestion estimation and minimization during placement. ispd 2000: 147-152 [doi]
Abhishek Ranjan, Kia Bazargan, Majid Sarrafzadeh. Fast Hierarchical Floorplanning with Congestion and Timing Control. iccd 2000: 357-362 [doi]
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh. Fast Template Placement for Reconfigurable Computing Systems. dt, 17(1):68-83, 2000. [doi]
Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh. Timing Driven Gate Duplication: Complexity Issues and Algorithms. iccad 2000: 447-450
Xiaojian Yang, Maogang Wang, Kenneth Eguro, Majid Sarrafzadeh. A snap-on placement tool. ispd 2000: 153-158 [doi]
F. S. Ogrenci, Aggelos K. Katsaggelos, Majid Sarrafzadeh. FPGA implementation and analysis of image restoration. fpga 2000: 219 [doi]
Kia Bazargan, Abhishek Ranjan, Majid Sarrafzadeh. Fast and accurate estimation of floorplans in logic/high-level synthesis. glvlsi 2000: 95-100 [doi]
Wei-Liang Lin, Amir H. Farrahi, Majid Sarrafzadeh. On the Power of Logic Resynthesis. siamcomp, 29(4):1257-1289, 2000.
Maogang Wang, Majid Sarrafzadeh. Modeling and minimization of routing congestion. aspdac 2000: 185-190 [doi]
Amir H. Farrahi, David J. Hathaway, Maogang Wang, Majid Sarrafzadeh. Quality of EDA CAD Tools: Definitions, Metrics and Directions. isqed 2000: 395-406 [doi]
Jason Cong, Majid Sarrafzadeh. Incremental physical design. ispd 2000: 84-92 [doi]
Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh. A C to Hardware/Software Compiler. fccm 2000: 331-332 [doi]
Michael F. Gorman, Majid Sarrafzadeh. An application of dynamic programming to crew balancing at Burlington Northern Santa Fe Railway. ijstm, 1(2/3):174-187, 2000. [doi]
Chunhong Chen, Xiaojian Yang, Majid Sarrafzadeh. Potential Slack: An Effective Metric of Combinational Circuit Performance. iccad 2000: 198-201
Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy, editors, Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000. ACM, 2000.

Kia Bazargan, Samjung Kim, Majid Sarrafzadeh. Nostradamus: a floorplanner of uncertain designs. tcad, 18(4):389-397, 1999. [doi]
Kiarash Barzagan, Majid Sarrafzadeh. Fast Online Placement for Reconfigurable Computing. fccm 1999: 300 [doi]
Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh. Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization. vlsid 1999: 423-427 [doi]
Majid Sarrafzadeh, Salil Raje. Scheduling with multiple voltages under resource constraints. iscas 1999: 350-353 [doi]
Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh. 3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. rsp 1999: 38 [doi]
Amir H. Farrahi, D. T. Lee, Majid Sarrafzadeh. Two-Way and Multiway Partitioning of a Set of Intervals for Clique-Width Maximization. algorithmica, 23(3):187-210, 1999. [doi]
Maogang Wang, Majid Sarrafzadeh. On the behavior of congestion minimization during placement. ispd 1999: 145-150 [doi]
Chunhong Chen, Majid Sarrafzadeh. An Effective Algorithm for Gate-Level Power-Delay Tradeoff Using Two Voltages. iccd 1999: 222 [doi]
Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran. An Incremental Floorplanner. glvlsi 1999: 248-251 [doi]
Morgan Enos, Scott Hauck, Majid Sarrafzadeh. Evaluation and optimization of replication algorithms for logic bipartitioning. tcad, 18(9):1237-1248, 1999. [doi]
Chunhong Chen, Majid Sarrafzadeh. Provably good algorithm for low power consumption with dual supply voltages. iccad 1999: 76-79 [doi]
S. Nicoloso, Majid Sarrafzadeh, X. Song. On the Sum Coloring Problem on Interval Graphs. algorithmica, 23(2):109-126, 1999. [doi]

Jim E. Crenshaw, Majid Sarrafzadeh. Low Power Driven Scheduling and Binding. glvlsi 1998: 406-413 [doi]
Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh. Partitioning sequential circuits for low power. vlsid 1998: 212-217 [doi]
Andrew B. Kahng, Majid Sarrafzadeh. Guest Editorial. tcad, 17(1):1-2, 1998. [doi]
Majid Sarrafzadeh, Wei-Liang Lin, C. K. Wong. Floating Steiner Trees. TC, 47(2):197-211, 1998.
Kia Bazargan, Samjung Kim, Majid Sarrafzadeh. Nostradamus: a floorplanner of uncertain design. ispd 1998: 18-23 [doi]
Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh. Potential-NRG: Placement with Incomplete Data. dac 1998: 279-282 [doi]
Jun Dong Cho, Salil Raje, Majid Sarrafzadeh. Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering vor VLSI Applications. TC, 47(11):1253-1266, 1998.
Jun Dong Cho, Majid Sarrafzadeh. Four-bend top-down global routing. tcad, 17(9):793-802, 1998. [doi]

Majid Sarrafzadeh, Maogang Wang. NRG: global and detailed placement. iccad 1997: 532-537 [doi]
Majid Sarrafzadeh, David A. Knol, Gustavo E. Téllez. A delay budgeting algorithm ensuring maximum flexibility in placement. tcad, 16(11):1332-1341, 1997. [doi]
Salil Raje, Majid Sarrafzadeh. Scheduling with multiple voltages. integration, 23(1):37-59, 1997. [doi]
Jim E. Crenshaw, Majid Sarrafzadeh. Accurate high level datapath power estimation. date 1997: 590-596 [doi]
Morgan Enos, Scott Hauck, Majid Sarrafzadeh. Replication for logic bipartitioning. iccad 1997: 342-349 [doi]
Majid Sarrafzadeh, David A. Knol, Gustavo E. Téllez. Unification of Budgeting and Placement. dac 1997: 758-761 [doi]
Gustavo E. Téllez, Majid Sarrafzadeh. Minimal buffer insertion in clock trees with skew and slew rate constraints. tcad, 16(4):333-342, 1997. [doi]

De-Sheng Chen, Majid Sarrafzadeh. An Exact Algorithm for Low Power Library-Specific Gate Re-Sizing. dac 1996: 783-788 [doi]

Elof Frank, Salil Raje, Majid Sarrafzadeh. Constrained Register Allocation in Bus Architectures. dac 1995: 170-175 [doi]
Gary K. H. Yeap, Majid Sarrafzadeh. Sliceable Floorplanning by Graph Dualization. siamdm, 8(2):258-280, 1995. [doi]
Gustavo E. Téllez, Majid Sarrafzadeh. On Rectilinear Distance-Preserving Trees. iscas 1995: 163-166
Amir H. Farrahi, Majid Sarrafzadeh. System partitioning to maximize sleep time. iccad 1995: 452-455 [doi]
Salil Raje, Majid Sarrafzadeh. Variable voltage scheduling. islped 1995: 9-14 [doi]
Amir H. Farrahi, Gustavo E. Téllez, Majid Sarrafzadeh. Memory Segmentation to Exploit Sleep Mode Operation. dac 1995: 36-41 [doi]
De-Sheng Chen, Majid Sarrafzadeh, Gary K. H. Yeap. State Encoding of Finite State Machines for Low Power Design. iscas 1995: 2309-2312
Gustavo E. Téllez, Amir H. Farrahi, Majid Sarrafzadeh. Activity-driven clock design for low power circuits. iccad 1995: 62-65 [doi]
Malgorzata Marek-Sadowska, Majid Sarrafzadeh. The crossing distribution problem [IC layout]. tcad, 14(4):423-433, 1995. [doi]
Majid Sarrafzadeh, Sanjeev R. Maddila. Discrete Warehouse Problem. TCS, 140(2):231-247, 1995. [doi]
Wei-Liang Lin, Majid Sarrafzadeh. A Linear Arrangement Problem with Applications. iscas 1995: 57-60

Jun Dong Cho, Majid Sarrafzadeh. The pin redistribution problem in multi-chip modules. mp, 63:297-330, 1994.
Amir H. Farrahi, Majid Sarrafzadeh. Complexity of the lookup-table minimization problem for FPGA technology mapping. tcad, 13(11):1319-1332, 1994. [doi]
Charles Chiang, Chak-Kuen Wong, Majid Sarrafzadeh. A weighted Steiner tree-based global router with simultaneous length and density minimization. tcad, 13(12):1461-1469, 1994. [doi]
Amir H. Farrahi, Majid Sarrafzadeh. FPGA Technology Mapping for Power Minimization. fpl 1994: 66-77
Kuo-Feng Liao, Majid Sarrafzadeh. Correction to Boundary single-layer routing with movable terminals . tcad, 13(5):638, 1994. [doi]
Majid Sarrafzadeh, Dorothea Wagner, Frank Wagner, Karsten Weihe. Wiring Knock-Knee Layouts: A Global Approach. TC, 43(5):581-589, 1994.
Gustavo E. Téllez, Majid Sarrafzadeh. Clock period constrained minimal buffer insertion in clock trees. iccad 1994: 219-223 [doi]
Wei-Liang Lin, Majid Sarrafzadeh, Chak-Kuen Wong. The reproducing placement problem with applications. iccad 1994: 686-689 [doi]
Majid Sarrafzadeh, Kuo-Feng Liao, Chak-Kuen Wong. Single-layer global routing. tcad, 13(1):38-47, 1994. [doi]
Yoji Kajitani, Jun Dong Cho, Majid Sarrafzadeh. New Approximation Results on Graph Matching and related Problems. criwg 1995: 343-358
Majid Sarrafzadeh, D. T. Lee. Restricted track assignment with applications. ijcga, 4(1):53-68, 1994.
Jun Dong Cho, Salil Raje, Majid Sarrafzadeh. Approximation Algorithm on Multi-Way Maxcut Partitioning. esa 1994: 148-158

Jun Dong Cho, Majid Sarrafzadeh. A Nuffer Distribution Algorithm for High-Speed Clock Routing. dac 1993: 537-543 [doi]
Kok-Hoo Yeap, Majid Sarrafzadeh. Floor-Planning by Graph Dualization: 2-Concave Rectilinear Modules. siamcomp, 22(3):500-526, 1993.
D. T. Lee, Majid Sarrafzadeh. Maximum independent set of a permutation graph in K tracks. ijcga, 3(3):291-304, 1993.
Salil Raje, Majid Sarrafzadeh. GEM: A Geometric Algorithm for Scheduling. iscas 1993: 1991-1994
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh. Utilization of vacant terminals for improved over-the-cell channel routing. tcad, 12(6):780-792, 1993. [doi]
Majid Sarrafzadeh. Transforming an arbitrary floorplan into a sliceable one. iccad 1993: 386-389 [doi]
Charles J. Alpert, Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh. Minimum Density Interconneciton Trees. iscas 1993: 1865-1868
Ruey-Der Lou, Majid Sarrafzadeh. An Optimal Algorithm for the Maximum Three-Chain Problem. siamcomp, 22(5):976-993, 1993.
Majid Sarrafzadeh, Ruey-Der Lou. Maximum k-Covering of Weighted Transitive Graphs with Applications. algorithmica, 9(1):84-100, 1993.
Jun Dong Cho, Majid Sarrafzadeh, Mysore Sriram, Sung-Mo Kang. High-Performance MCM Routing. dt, 10(4):27-37, 1993. [doi]
Jan-Ming Ho, Atsushi Suzuki, Majid Sarrafzadeh. An exact algorithm for single-layer wire length minimization. tcad, 12(1):175-180, 1993. [doi]
Yachyang Sun, Majid Sarrafzadeh. Floorplanning by Graph Dualization: L-shaped Modules. algorithmica, 10(6):429-456, 1993.
Gary K. H. Yeap, Majid Sarrafzadeh. A unified approach to floorplan sizing and enumeration. tcad, 12(12):1858-1867, 1993. [doi]

Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh, Chak-Kuen Wong. Provably good performance-driven global routing. tcad, 11(6):739-752, 1992. [doi]
Majid Sarrafzadeh, D. T. Lee. Rstricted Track Assignment with Applications. isaac 1992: 449-458
De-Sheng Chen, Majid Sarrafzadeh. A wire-length minimization algorithm for single-layer layouts. iccad 1992: 390-393 [doi]
Sivakumar Natarajan, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh. Over-the-Cell Channel Routing for High Performance Circuits. dac 1992: 600-603 [doi]
Ruey-Der Lou, Majid Sarrafzadeh. Circular Permutation Graph Family with Applications. dam, 40(4):433-457, 1992.
Ruey-Der Lou, Majid Sarrafzadeh, Chong S. Rim, Kazuo Nakajima, Sumio Masuda. General Circular Permutation Layout. mst, 25(4):269-292, 1992.
Majid Sarrafzadeh, C. K. Wong. Bottleneck Steiner Trees in the Plane. TC, 41(3):370-374, 1992.
Bo Wu, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh. Over-the-Cell Routers for New Cell Model. dac 1992: 604-607 [doi]
Ruey-Der Lou, Majid Sarrafzadeh, D. T. Lee. An Optimal Algorithm for the Maximum Two-Chain Problem. siamdm, 5(2):285-304, 1992.
Majid Sarrafzadeh, Dorothea Wagner, Frank Wagner, Karsten Weihe. Wiring Knock-Knee Layouts: A Global Appoach. isaac 1992: 388-399
Majid Sarrafzadeh, Chak-Kuen Wong. Hierarchical Steiner tree construction in uniform orientations. tcad, 11(9):1095-1103, 1992. [doi]

Majid Sarrafzadeh, D. T. Lee. Topological Via Minimization Revisited. TC, 40(11):1307-1312, 1991.
D. T. Lee, Majid Sarrafzadeh. Maximum Independent Set of a Permutation Graph in ::::k:::: Tracks. sersc-isa 1991: 2-11
Kuo-Feng Liao, Majid Sarrafzadeh. Boundary single-layer routing with movable terminals. tcad, 10(11):1382-1391, 1991. [doi]
Malgorzata Marek-Sadowska, Majid Sarrafzadeh. The Crossing Distribution Problem. iccad 1991: 528-531
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh. New Algorithm for Over-the-Cell Channel Routing Using Vacant Terminals. dac 1991: 126-131 [doi]
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh. Algorithms for Three-Layer Over-The-Cell Channel Routing. iccad 1991: 428-431
Jason Cong, Andrew B. Kahng, Gabriel Robins, Majid Sarrafzadeh, C. K. Wong. Performance-Driven Global Routing for Cell Based ICs. iccd 1991: 170-173

Martin L. Brady, Majid Sarrafzadeh. Stretching a Knock-Knee Layout for Multilayer Wiring. TC, 39(1):148-151, 1990.
Jan-Ming Ho, Majid Sarrafzadeh, Gopalakrishnan Vijayan, Chak-Kuen Wong. Pad minimization for planar routing of multiple power nets. tcad, 9(4):419-426, 1990. [doi]
Manbir Nag, Majid Sarrafzadeh. A Parallel Algorithm for Two-Layer Wirin. icpp 1990: 278-285
Kuo-Feng Liao, Majid Sarrafzadeh. Vertex-Disjoint Trees and Boundary Single-Layer Routing. criwg 1991: 99-108
Jan-Ming Ho, Majid Sarrafzadeh, Gopalakrishnan Vijayan, Chak-Kuen Wong. Layer assignment for multichip modules. tcad, 9(12):1272-1277, 1990. [doi]
D. T. Lee, Majid Sarrafzadeh, Ying-Fung Wu. Minimum Cuts for Circular-Arc Graphs. siamcomp, 19(6):1041-1050, 1990.
Ruey-Der Lou, Majid Sarrafzadeh, D. T. Lee. An Optimal Algorithm for the Maximum Two-Chain Problem. soda 1990: 149-158
Jan-Ming Ho, Majid Sarrafzadeh, Atsushi Suzuki. An Exact Algorithm for Single-Layer Wire-Length Minimization. iccad 1990: 424-427
Charles Chiang, Majid Sarrafzadeh, Chak-Kuen Wong. Global routing based on Steiner min-max trees. tcad, 9(12):1318-1325, 1990. [doi]
Majid Sarrafzadeh. Area Minimization in a Three-Sided Switchbox by Sliding the Modules. TC, 39(11):1395-1403, 1990.

Gianfranco Bilardi, Scot W. Hornick, Majid Sarrafzadeh. Optimal VLSI Architectures for Multidimensional DFT. spaa 1989: 265-272 [doi]
Majid Sarrafzadeh, D. T. Lee. A new approach to topological via minimization. tcad, 8(8):890-900, 1989. [doi]

Majid Sarrafzadeh. Channel-Routing Problem in the Knock-Knee Mode Is NP-Complete. tcad, 6(4):503-506, 1987. [doi]
Scot W. Hornick, Majid Sarrafzadeh. On Problem Transformability in VLSI. algorithmica, 2:97-111, 1987.

Kurt Mehlhorn, Franco P. Preparata, Majid Sarrafzadeh. Channel Routing in Knock-Knee Mode: Simplified Algorithms and Proofs. algorithmica, 1(2):213-221, 1986.