Abstract is missing.
- Computational Medical and Health Care TechnologyYutaka Hata, Hiroshi Nakajima. 1-5 [doi]
- Systems Health Care: Health Management TechnologyHiroshi Nakajima, Toshikazu Shiga, Yutaka Hata. 6-11 [doi]
- Wearable Human Activity Recognition by Electrocardiograph and AccelerometerTatsuhiro Fujimoto, Hiroshi Nakajima, Naoki Tsuchiya, Hideya Marukawa, Kei Kuramoto, Syoji Kobashi, Yutaka Hata. 12-17 [doi]
- Gaze Estimation Using Electrooculogram Signals and Its Mathematical ModelingMingmin Yan, Hiroki Tamura, Koichi Tanno. 18-22 [doi]
- Fuzzy Damage Extraction Method for Ultrasonic Nondestructive Testing ImagesKoki Tsukuda, Tadahito Egawa, Kazuhiko Taniguchi, Kei Kuramoto, Syoji Kobashi, Yutaka Hata. 23-28 [doi]
- Fault Ordering for Automatic Test Pattern Generation of Reversible CircuitsRobert Wille, Hongyan Zhang, Rolf Drechsler. 29-34 [doi]
- Synthesis of Reversible Circuits Based on Products of Exclusive OR SumsBen Schaeffer, Linh Tran, Addison Gronquist, Marek A. Perkowski, Pawel Kerntopf. 35-40 [doi]
- Multiple-Valued Reversible Benchmarks and Extensible Quantum Specification (XQS) FormatMaher Hawash, Martin Lukac, Michitaka Kameyama, Marek A. Perkowski. 41-46 [doi]
- Analysis and Improvement of Transformation-Based Reversible Logic SynthesisChander Chandak, Anupam Chattopadhyay, Soumajit Majumder, Subhamoy Maitra. 47-52 [doi]
- A Fuzzy Human Detection for Security System Using Infrared Laser CameraTakahiro Takeda, Kei Kuramoto, Syoji Kobashi, Yutaka Hata. 53-58 [doi]
- Mining Multi Human Locations Using Thermopile Array SensorsMasato Kuki, Hiroshi Nakajima, Naoki Tsuchiya, Kei Kuramoto, Syoji Kobashi, Yutaka Hata. 59-64 [doi]
- On Selection of Intraocular Power Formula Using Support Vector Machines and Genetic AlgorithmNaotake Kamiura, Tomoya Fukuda, Ayumu Saitoh, Teijiro Isokawa, Nobuyuki Matsui, Hitoshi Tabuchi. 65-70 [doi]
- A Broken Line Classification Method of Mathematical Graphs for Automating Translation into Scalable Vector GraphicNoboru Takagi, Jianjun Chen. 71-76 [doi]
- On Synthesis and Verification from Event Diagrams in a Robot Theatre ApplicationMarek A. Perkowski, Aditya Bhutada, Martin Lukac, Mathias Sunardi. 77-83 [doi]
- Remarks on Applications of Shapes of Decision Diagrams in Classification of Multiple-Valued Logic FunctionsStanislav Stankovic, Radomir S. Stankovic, Jaakko Astola. 84-89 [doi]
- A Machine to Evaluate Decomposed Multi-Terminal Multi-Valued Decision Diagrams for Characteristic FunctionsHiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura. 90-95 [doi]
- An Application of Autocorrelation Functions to Find Linear Decompositions for Incompletely Specified Index Generation FunctionsTsutomu Sasao. 96-102 [doi]
- A Transfer Function Model for Ternary Switching Logic CircuitsMitchell A. Thornton. 103-108 [doi]
- Spectral Response of Ternary Logic NetlistsMitchell A. Thornton, Theodore W. Manikas. 109-116 [doi]
- A Study on Essentially Minimal ClonesHajime Machida, Ivo G. Rosenberg. 117-122 [doi]
- A Solution to a Problem of D. Lau: Complete Classification of Intervals in the Lattice of Partial Boolean ClonesMiguel Couceiro, Lucien Haddad, Karsten Schölzel, Tamás Waldhauser. 123-128 [doi]
- On the Clones Containing a Near-Unanimity FunctionDmitriy Zhuk, Stanislav Moiseev. 129-134 [doi]
- Intersections with Slupecki Partial Clones on a Finite SetLucien Haddad, Karsten Schölzel. 135-140 [doi]
- Not Finitely Definable Partial Clones on a Finite SetBoris A. Romov. 141-145 [doi]
- Design and Evaluation of a Differential Switching Gate for Low-Voltage ApplicationsMasanori Natsui, Kiyohiro Kashiuchi, Takahiro Hanyu. 146-151 [doi]
- A Successive Approximation A/D Converter Using Generalized Non-Binary AlgorithmYuki Kurisu, Tatsuya Sasaki, Takao Waho. 152-157 [doi]
- A Graph-Based Approach to Designing Parallel Multipliers over Galois Fields Based on Normal Basis RepresentationsKotaro Okamoto, Naofumi Homma, Takafumi Aoki. 158-163 [doi]
- Low-Power Multiple-Valued Source-Coupled Logic Circuits Using Dual-Supply Voltages for a Reconfigurable VLSIXu Bai, Michitaka Kameyama. 164-169 [doi]
- Dramatically Low-Transistor-Count High-Speed Ternary AddersReza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Mojtaba Maleknejad, Keivan Navi, Omid Hashemipour. 170-175 [doi]
- The Complexity of Lukasiewicz LogicMartin Goldstern. 176-181 [doi]
- On Hyper Co-ClonesJelena Colic, Hajime Machida, Jovanka Pantovic. 182-185 [doi]
- Clones of Partial CofunctionsSebastian Kerkhoff, Friedrich Martin Schneider. 186-191 [doi]
- Boolean Max-Co-ClonesAndrei A. Bulatov. 192-197 [doi]
- Four Decades of Multi-Valued Logic: Lists of Highly Cited PapersTsutomu Sasao. 198-202 [doi]
- Chaotic Time Series Prediction Using Neuro-Fuzzy Systems with Cluster-Based Tribes Optimization AlgorithmCheng-Hung Chen, Rong-Zuo Jhang, Yen-Yun Liao. 203-208 [doi]
- Join Operations on Commutative BCK-Algebras with Condition (S)Mayuka F. Kawaguchi, Kouta Minami, Michiro Kondo. 209-211 [doi]
- Highly Reliable Non-Volatile Logic Circuit Technology and Its ApplicationHiromitsu Kimura, Zhiyong Zhong, Yuta Mizuochi, Norihiro Kinouchi, Yoshinobu Ichida, Yoshikazu Fujimori. 212-218 [doi]
- Tense Operators and Dynamic De Morgan AlgebrasIvan Chajda, Jan Paseka. 219-224 [doi]
- On the Combinatorics of Tolerance RelationsDan A. Simovici. 225-230 [doi]
- On Natural Eight-Valued ReasoningNorihiro Kamide. 231-236 [doi]
- Embedding-Based Methods for Trilattice LogicNorihiro Kamide. 237-242 [doi]
- On the Semigroup of Equational Classes of Finite FunctionsJorge Almeida, Miguel Couceiro, Tamás Waldhauser. 243-247 [doi]
- Comparing Performance of a Multiple-Valued Time-Based Serial Data Link with Other Serial LinksMostafa Rashdan, James W. Haslett. 248-253 [doi]
- Lowering Error Floors in Stochastic Decoding of LDPC Codes Based on Wire-Delay Dependent Asynchronous UpdatingNaoya Onizawa, Warren J. Gross, Takahiro Hanyu, Vincent C. Gaudet. 254-259 [doi]
- Expandable MVL Inverter Compatible with Standard CMOS Process and Its Application to MVL Hysteresis ComparatorArif Abdul Mannan, Koichi Tanno, Hiroki Tamura, Takako Toyama, Agung Darmawansyah. 260-265 [doi]
- Accurate and High-Speed Asynchronous Network-on-Chip Simulation Using Physical Wire-Delay InformationTakahiro Hanyu, Yuma Watanabe, Atsushi Matsumoto. 266-271 [doi]
- An Area-Efficient Multiple-Valued Reconfigurable VLSI Architecture Using an X-NetXu Bai, Michitaka Kameyama. 272-277 [doi]
- Noise-Tolerant Model of a Ternary Inverter Based on Markov Random FieldGolam Tangim, Svetlana N. Yanushkevich, Seiya Kasai, Vlad P. Shmerko. 278-283 [doi]
- Minimization of the Number of Edges in an EVMDD by Variable Grouping for Fast Analysis of Multi-State SystemsShinobu Nagayama, Tsutomu Sasao, Jon T. Butler. 284-289 [doi]
- Secure Key Storage Using State MachinesNan Li, Shohreh Sharif Mansouri, Elena Dubrova. 290-295 [doi]
- The Impact of Address Arithmetic on the GPU Implementation of Fast Algorithms for the Vilenkin-Chrestenson TransformDuan B. Gajic, Radomir S. Stankovic. 296-301 [doi]
- Solution of the Last Open Four-Colored Rectangle-Free Grid: An Extremely Complex Multiple-Valued ProblemBernd Steinbach, Christian Posthoff. 302-309 [doi]
- Ternary Logic Network Justification Using Transfer MatricesMitchell A. Thornton, Jennifer Dworak. 310-315 [doi]
- Debugging of Reversible Circuits Using pDDsLaura Tague, Mathias Soeken, Shin-ichi Minato, Rolf Drechsler. 316-321 [doi]
- Analysis of Reversible and Quantum Finite State Machines Using Homing, Synchronizing and Distinguishing Input SequencesMartin Lukac, Michitaka Kameyama, Marek A. Perkowski, Pawel Kerntopf. 322-327 [doi]
- Exact Template Matching Using Boolean SatisfiabilityNabila Abdessaied, Mathias Soeken, Robert Wille, Rolf Drechsler. 328-333 [doi]
- Synthesis of Balanced Ternary Reversible Logic CircuitBikromadittya Mondal, Pradyut Sarkar, Pranay Kumar Saha, Susanta Chakraborty. 334-339 [doi]
- Contribution to the Study of Multiple-Valued Bent FunctionsClaudio Moraga, Milena Stankovic, Radomir S. Stankovic, Suzana Stojkovic. 340-345 [doi]
- Alternative Proof of Mulholland's Theorem and New Solutions to Mulholland InequalityMilan Petrík, Mirko Navara, Peter Sarkoci. 346-351 [doi]