Abstract is missing.
- High-Level-Language Compilation for Reconfigurable ComputersAndreas Koch, Nico Kasprzyk. 1-8
- Symbiotic Processing: Toward a Better Balance Between Architecture, Compiler and User EffortsYves Lhuillier, Pierre Palatin, Olivier Temam. 9-18
- Compiler level integration of a portable CAD framework for reconfigurable circuitsChristophe Gouyen, Loïc Lagadec, Bernard Pottier, A. André, E. Lepicier, François Dupont. 19-26
- Co-Design of Massively Parallel Embedded Processor ArchitecturesFrank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys. 27-34
- Dynamic Reconfiguration On-Demand: Real-time Adaptivity in Next Generation MicroelectronicsJürgen Becker, Michael Hübner, Katarina Paulsson, Alexander Thomas. 35-42
- An adaptive FPGA and its distributed routingYann Thoma, Eduardo Sanchez. 43-53
- Analysis and Architectural Study of a Hybrid ASIC/Configurable State Machine ModelPeter Zipf, Claude Stötzler, Manfred Glesner. 53-58
- Implementation of Scalable Embedded FPGA for SOCHayder Mrabet, Zied Marrakchi, Habib Mehrez, André Tissot. 59-62
- Feedback control modelling for learning reconfigurable embedded systemsJean-Philippe Diguet, Yvan Eustache, Nader Ben Amor, Soufien Hammami. 63-70
- Exploring RTOS issues with a high-level model of a reconfigurable SoC platformFrançois Verdier, Jean-Christophe Prévotet, Amine Benkhelifa, Daniel Chillet, Sébastien Pillement. 71-78
- Experiences on Actor-oriented Design of Reconfigurable SystemsLeandro Soares Indrusiak, Manfred Glesner. 79-84
- Advanced On-Chip Communication Architectures and Routing Methods for Systems-on-ChipThomas Hollstein, Sujan Pandey, Manfred Glesner. 85-92
- Proposition of a benchmark for evaluation of cores mapping onto NoC architecturesJulien Delorme, Dominique Houzet, Romain Lemaire, Didier Lattard. 93-98
- System Monitoring and Reconfiguration in Proteo NoCDavid A. Sigüenza-Tortosa, Jari Nurmi. 99-104
- Asynchronous Systems on Programmable LogicLaurent Fesquet, Jerome Quartana, Marc Renaudin. 105-112
- Non-volatile SRAM-FPGA based on magnetic tunnelling junctionNicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli. 113-120
- Towards reconfigurable optical networks on chipIan O Connor, Matthieu Briere, Emmanuel Drouard, Art Kazmierczak, Faress Tissafi-Drissi, David Navarro, Fabien Mieyeville, Joni Dambre, Dirk Stroobandt, J.-M. Fedeli, Zbigniew Lisik, Frédéric Gaffiot. 121-128
- Model Driven Engineering for Regular MPSoC Co-designPierre Boulet, Arnaud Cuccuru, Jean-Luc Dekeyser, Ashish Meena. 129-136
- Power/Energy Estimation in SoCs by Multi-Level Parametric ModelingNathalie Julien, Johann Laurent, Eric Senn, David Elléouet, Yannig Savary, Nabil Abdelli, J. Ktari. 137-142
- Formal methods for Embedded Systems Co-design: the FORDESIGN projectLuís Gomes, João Paulo Barros, Anikó Costa, Rui Pais, Filipe Moutinho. 143-150
- Design and Implementation of a Multi-Core Architecture for Overhead Processing in Optical Transport NetworksTudor Murgan, Abdulfattah Mohammad Obeid, Andre Guntoro, Peter Zipf, Manfred Glesner, Ulrich Heinkel. 151-156
- Implementation Challenges in Complex Adaptive SystemsAlfredo Rosado Muñoz, Emilio Soria-Olivas, Joan Vila-Francés, Jordi Muñoz-Marí, Javier Calpe-Maravilla. 157-162
- Integration of Reconfigurable Logic on Secure CircuitsNicolas Valette, Lionel Torres, Frédéric Bancel, Nicolas Bérard. 163-168
- A new hardware countermeasure for masking power signatures of crypto coresDaniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes. 169-176
- STARSoC : A C-based platform for rapid prototyping of embedded systemAbdelHalim Samahi, Sami Boukhechem, El-Bay Bourennane, Nasser E. Idirene. 177-182