Hritam Dutta - researchr alias

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Viewing Publication 1 - 23 from 23

2019

Efficient Mapping of Streaming Applications for Image Processing on Graphics CardsRichard Membarth, Hritam Dutta, Frank Hannig, Jürgen Teich. thipeac, 5:1-20, 2019. [doi]

2011

Synthesis and exploration of loop accelerators for systems-on-a-chipHritam Dutta. PhD thesis, University of Erlangen-Nuremberg, 2011. [doi]

2010

Modeling and synthesis of communication subsystems for loop accelerator pipelinesHritam Dutta, Frank Hannig, Moritz Schmid, Joachim Keinert. asap 2010: 125-132 [doi]

2009

Impact of Loop Tiling on the Controller Logic of Acceleration EnginesHritam Dutta, Jiali Zhai, Frank Hannig, JÃ¼rgen Teich. asap 2009: 161-168 [doi]

Performance Matching of Hardware Acceleration Engines for Heterogeneous MPSoC Using Modular Performance AnalysisHritam Dutta, Frank Hannig, Jürgen Teich. arcs 2009: 233-245 [doi]

A holistic approach for tightly coupled reconfigurable parallel processorsHritam Dutta, Dmitrij Kissler, Frank Hannig, Alexey Kupriyanov, JÃ¼rgen Teich, Bernard Pottier. mam, 33(1):53-62, 2009. [doi]

Parallelization Approaches for Hardware Accelerators - Loop Unrolling Versus Loop PartitioningFrank Hannig, Hritam Dutta, Jürgen Teich. arcs 2009: 16-27 [doi]

Model-based synthesis and optimization of static multi-rate image processing algorithmsJoachim Keinert, Hritam Dutta, Frank Hannig, Christian Haubelt, JÃ¼rgen Teich. date 2009: 135-140 [doi]

Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics ProcessorsRichard Membarth, Frank Hannig, Hritam Dutta, JÃ¼rgen Teich. samos 2009: 277-288 [doi]

Acceleration of Multiresolution Imaging Algorithms: A Comparative StudyRichard Membarth, Philipp Kutzer, Hritam Dutta, Frank Hannig, JÃ¼rgen Teich. asap 2009: 211-214 [doi]

2008

2007

2006

2005

2004

Mapping of Regular Nested Loop Programs to Coarse-Grained Reconfigurable Arrays - Constraints and MethodologyFrank Hannig, Hritam Dutta, Jürgen Teich. ipps 2004: [doi]

Regular mapping for coarse-grained reconfigurable architecturesFrank Hannig, Hritam Dutta, Jürgen Teich. icassp 2004: 57-60 [doi]

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