Abstract is missing.
- Advanced power management of SoC platformsLuca Benini. 1 [doi]
- A design methodology for analogue CMOS circuitsPaul L. Jespers. 2 [doi]
- The process of higher level designJohn Sanguinetti. 3 [doi]
- Technology and architecture for deep submicron RF CMOS technologyAbdelkarim Mercha. 4 [doi]
- High level design: the future is nowJohn Sanguinetti. 5 [doi]
- Energy efficient NoC designLuca Benini. 6 [doi]
- A survey of multistep A to D converters and error correction mechanismsPaul L. Jespers. 7 [doi]
- IC design requirements for automotive applicationsArmando G. da Silva Jr.. 8 [doi]
- EMC-EMI optimized high speed CAN line driverArmando Gomes, Edevaldo Pereira S. Júnior, Ivan Carlos Ribeiro do Nascimento. 9-14 [doi]
- On the design of very small transconductance OTAs with reduced input offsetAlfredo Arnaud, Rafaella Fiorelli, Carlos Galup-Montoro. 15-20 [doi]
- T-shaped association of transistors: modeling of multiple channel lengths and regular associationsAlessandro Girardi, Fernando da Rocha Paixão Cortes, Eduardo Conrad Jr., Sergio Bampi. 21-26 [doi]
- On the adequate transistor modeling for optimal design of CMOS OTAE. P. Santana, N. R. Ferreira, C. E. T. Dorea, Ana Isabela Araújo Cunha. 27-31 [doi]
- Fundamentals of next generation compact MOSFET modelsCarlos Galup-Montoro, Márcio C. Schneider, Viriato C. Pahim. 32-37 [doi]
- Improving run times by pruned application of synthesis transformsRenato Fernandes Hentschke, Jagannathan Narasimhan, David S. Kung. 38-43 [doi]
- An efficient subcircuit recognition using the nonlinear graph matchingNikolay Rubanov. 44-49 [doi]
- Task sheduling for power optimisation of multi frequency synchronous data flow graphsBastian Knerr, Martin Holzer 0002, Markus Rupp. 50-55 [doi]
- Miriã_SI: a tool for the synthesis of speed-independent multi burst-mode controllersDuarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau. 56-61 [doi]
- Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logicEgas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt. 62-67 [doi]
- A constraint-based solution for on-line testing of processors embedded in real-time applicationsMarcelo de Souza Moraes, Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski. 68-73 [doi]
- Automatic generation of test sets for SBST of microprocessor IP coresErnesto Sánchez, Matteo Sonza Reorda, Giovanni Squillero, Massimo Violante. 74-79 [doi]
- Going beyond TMR for protection against multiple faultsCarlos Arthur Lang Lisbôa, Erik Schüler, Luigi Carro. 80-85 [doi]
- Arithmetic-based address translation for energy-efficient virtual memory support in low-power, real-time embedded systemsXiangrong Zhou, Peter Petrov. 86-91 [doi]
- Exploiting Java through binary translation for low power embedded reconfigurable systemsAntonio Carlos Schneider Beck, Victor F. Gomes, Luigi Carro. 92-97 [doi]
- A time petri net based approach for embedded hard real-time software synthesis with multiple operational modesEduardo Tavares, Paulo Romero Martins Maciel, Arthur Bessa, Raimundo S. Barreto, Leonardo Barros, Meuse N. Oliveira Jr., Ricardo Massa Ferreira Lima. 98-103 [doi]
- Making object oriented efficient for embedded system applicationsJúlio C. B. de Mattos, Emilena Specht, Bruno Neves, Luigi Carro. 104-109 [doi]
- Design of a decompressor engine on a SPARC processorRichard E. Billo, Rodolfo Azevedo, Guido Araujo, Paulo Centoducatte, Eduardo Wanderley Netto. 110-114 [doi]
- Current mask generation: a transistor level security against DPA attacksDaniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes. 115-120 [doi]
- Single event transients in combinatorial circuitsGilson I. Wirth, Michele G. Vieira, Egas Henes Neto, Fernanda Gusmão de Lima Kastensmidt. 121-126 [doi]
- Design and power optimization of CMOS RF blocks operating in the moderate inversion regionLeonardo Barboni, Rafaella Fiorelli. 127-132 [doi]
- Dual-standard BiCMOS LNA for DCS1800/W-CDMA applicationsC. P. Moreira, Eric Kerherve, P. Jarry, Didier Belot. 133-137 [doi]
- Design of a fully-integrated BiCMOS/FBAR reconfigurable RF receiver front-endC. P. Moreira, A. A. Shirakawa, Eric Kerherve, J. M. Pham, P. Jarry, Didier Belot, P. Ancey. 138-143 [doi]
- A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizerAngel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije. 144-148 [doi]
- Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasingSergio Gagliolo, Giacomo Pruzzo, Daniele D. Caviglia. 149-153 [doi]
- Total leakage power optimization with improved mixed gatesFrank Sill, Frank Grassert, Dirk Timmermann. 154-159 [doi]
- Number conversions between RNS and mixed-radix number system based on Modulo (2:::p - 1:::) signed-digit arithmeticShugang Wei. 160-165 [doi]
- An alternative logic approach to implement high-speed low-power full adder cellsMariano Aguirre, Monico Linares. 166-171 [doi]
- Design of a radix-2:::m::: hybrid array multiplier using carry save adder formatM. Fonseca, Eduardo A. C. da Costa, Sergio Bampi, José C. Monteiro. 172-177 [doi]
- Virtual channels in networks on chip: implementation and evaluation on hermes NoCAline Mello, Leonel Tedesco, Ney Calazans, Fernando Moraes. 178-183 [doi]
- Traffic generation and performance evaluation for mesh-based NoCsLeonel Tedesco, Aline Mello, Diego Garibotti, Ney Calazans, Fernando Moraes. 184-189 [doi]
- Design space exploration comparing homogeneous and heterogeneous network-on-chip architecturesMárcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Flávio Rech Wagner, Altamiro Amadeu Susin. 190-195 [doi]
- Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimationJosé Carlos S. Palma, César A. M. Marcon, Fernando Gehm Moraes, Ney Laert Vilar Calazans, Ricardo A. L. Reis, Altamiro Amadeu Susin. 196-201 [doi]
- Ultra-low power CMOS cells for temperature sensorsConrado Rossi, Pablo Aguirre. 202-206 [doi]
- New low-voltage electrically tunable triode-MOSFET transconductor and its application to low-frequency Gm-C filteringCarlos Dualibe, Pablo A. Petrashin, Luis E. Toledo, Walter J. Lancioni. 207-212 [doi]
- An efficient chopper amplifier, using a switched Gm-C Filter techniqueAlfredo Arnaud. 213-218 [doi]
- Minimization of parasitic effects on the design of an accurate 2-MHz RC oscillator for low voltage and low power applicationsJung Hyun Choi. 219-223 [doi]
- Fault tolerance overhead in network-on-chip flow control schemesAntonio Pullini, Federico Angiolini, Davide Bertozzi, Luca Benini. 224-229 [doi]
- Performance aware on-chip communication synthesis and optimization for shared multi-bus based architectureSujan Pandey, Manfred Glesner, Max Mühlhäuser. 230-235 [doi]
- Placement of intermodule connections on partially reconfigurable devicesFlorian Dittmann, Markus Heberling. 236-241 [doi]
- Non-linear addressing scheme for a lookup-based transformation function in a reconfigurable noise generatorElvio Dutra, Leandro Soares Indrusiak, Manfred Glesner. 242-247 [doi]
- A continuous-time hierarchical field programmable analogue array for rapid prototyping and hierarchical approach to analogue systems designDavid Varghese, J. N. Ross. 248-253 [doi]