Aruna Jayasena - researchr alias

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Viewing Publication 1 - 6 from 6

2024

Directed Test Generation for Hardware Validation: A SurveyAruna Jayasena, Prabhat Mishra 0001. ACM Comput. Surv., 56(5), May 2024. [doi]

2023

TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography AlgorithmsAruna Jayasena, Emma Andrews, Prabhat Mishra 0001. tvlsi, 31(9):1269-1279, September 2023. [doi]

Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare EventsAruna Jayasena, Prabhat Mishra 0001. tcad, 42(12):4450-4462, December 2023. [doi]

Automated Generation of Security Assertions for RTL ModelsHasini Witharana, Aruna Jayasena, Andrew Whigham, Prabhat Mishra 0001. jetc, 19(1), January 2023. [doi]

2022

Network-on-Chip Trust Validation Using Security AssertionsAruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana, Prabhat Mishra 0001. jhss, 6(3-4):79-94, 2022. [doi]

Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection AttacksAruna Jayasena, Khushboo Rani, Prabhat Mishra 0001. iccd 2022: 247-254 [doi]

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