Dmitry Burlyaev - researchr alias

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Viewing Publication 1 - 7 from 7

2018

A Static Analysis for the Minimization of Voters in Fault-Tolerant CircuitsDmitry Burlyaev, Pascal Fradet, Alain Girault. lites, 5(1), 2018. [doi]

2015

Formal Verification of Automatic Circuit Transformations for Fault-ToleranceDmitry Burlyaev, Pascal Fradet. FMCAD 2015: 41-48

Design, Optimization, and Formal Verification of Circuit Fault-Tolerance Techniques. (Conception, optimisation, et vérification formelle de techniques de tolérance aux fautes pour circuits)Dmitry Burlyaev. PhD thesis, Grenoble Alpes University, France, 2015. [doi]

Time-redundancy transformations for adaptive fault-tolerant circuitsDmitry Burlyaev, Pascal Fradet, Alain Girault. ahs 2015: 1-8 [doi]

Automatic Time-Redundancy Transformation for Fault-Tolerant CircuitsDmitry Burlyaev, Pascal Fradet, Alain Girault. fpga 2015: 218-227 [doi]

2014

System fault-tolerance analysis of COTS-based satellite on-board computersDmitry Burlyaev, René van Leuken. mj, 45(10):1335-1341, 2014. [doi]

Verification-guided voter minimization in triple-modular redundant circuitsDmitry Burlyaev, Pascal Fradet, Alain Girault. date 2014: 1-6 [doi]

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