Ian Brynjolfson - researchr alias

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Viewing Publication 1 - 3 from 3

2001

A new PLL design for clock management applicationsIan Brynjolfson, Zeljko Zilic. iscas 2001: 814-817 [doi]

2000

Dynamic clock management for low power applications in FPGAsIan Brynjolfson, Zeljko Zilic. cicc 2000: 139-142 [doi]

FPGA clock management for low power applications (poster abstract)Ian Brynjolfson, Zeljko Zilic. fpga 2000: 219 [doi]

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