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Bidyut K. Bhattacharyya

Suraj Kumar Saw

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Publications by 'Monalisa Das'

Publications

Viewing Publication 1 - 4 from 4

2022

FPGA Implementation of Hybrid Karatsuba Multiplications for NIST Post-Quantum Cryptographic Hardware PrimitivesMonalisa Das, Babita Jajodia. isocc 2022: 81-82 [doi]

Hardware Design of Optimized Large Integer Schoolbook Polynomial Multiplications on FPGAMonalisa Das, Babita Jajodia. isocc 2022: 65-66 [doi]

2019

Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip CommunicationAlak Majumder, Monalisa Das, Suraj Kumar Saw, Abir J. Mondal, Bidyut K. Bhattacharyya. tcas, 66-I(3):1231-1244, 2019. [doi]

2017

A 90nm Novel MUX-Dual Latch Design Approach for Gigascale Serializer ApplicationMonalisa Das, Alak Majumder, Abir J. Mondal, Bidyut K. Bhattacharyya. ifip5-5 2017: 210-214 [doi]

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