Morteza Mousazadeh - researchr alias

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2022

Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness DetectionSeyed Kian Mousavikia, Erfan Gholizadehazari, Morteza Mousazadeh, Siddika Berna Örs Yalçin. access, 10:58151-58162, 2022. [doi]

2021

A new high speed and low power decoder/encoder for Radix-4 Booth multiplierMir Majid Ghasemi, Amir Fathi, Morteza Mousazadeh, Abdollah Khoei. ijcta, 49(7):2199-2213, 2021. [doi]

A New True Random Number Generator Based on Differential Variable Ring Oscillator Robust Against PVT VariationNiloofar Khayyat Salighehdar, Morteza Mousazadeh, Abdolah Khoei. jcsc, 30(12), 2021. [doi]

2020

A high-speed, power efficient, dead-zone-less phase frequency detector with differential structureAlireza Abolhasani, Morteza Mousazadeh, Abdollah Khoei. mj, 97:104719, 2020. [doi]

Fast-locking PLL based on a novel PFD-CP structure and reconfigurable loop filterAlireza Abolhasani, Morteza Mousazadeh, Abdollah Khoei. iet-cds, 14(8):1235-1242, 2020. [doi]

2019

Generalized Method of Analog Circuit Characteristic Function AnalysisAmir Fathi, Abdollah Khoei, Morteza Mousazadeh. tcas, 66(2):172-176, 2019. [doi]

High-speed, low power, and dead zone improved phase frequency detectorAmir Fathi, Morteza Mousazadeh, Abdollah Khoei. iet-cds, 13(7):1056-1062, 2019. [doi]

A New High-speed and Low area Efficient Pipelined 128-bit Adder Based on Modified Carry Look-ahead Merging with Han-Carlson Tree MethodSara Ghafari, Morteza Mousazadeh, Abdollah Khoei, Ali Dadashi. mixdes 2019: 157-162 [doi]

A New Very High-speed True 7-3 CompressorSara Ghafari, Morteza Mousazadeh, Abdollah Khoei, Ali Dadashi. mixdes 2019: 163-166 [doi]

A Wide Band Fractional-N Synthesizer in 0.18um CMOS ProcessEbrahim Hosseini, Morteza Mousazadeh, Ali Dadashi. mixdes 2019: 171-177 [doi]

A Fast-Lock, Low Jitter, High-Speed Half-Rate CDR Architecture with a Composite Phase Detector (CPD)Zaher Kakehbra, Morteza Mousazadeh, Abdollah Khoei, Ali Dadashi. mixdes 2019: 141-146 [doi]

2018

High-Speed 32*32 bit Multiplier in 0.18um CMOS ProcessEbrahim Hosseini, Morteza Mousazadeh, Abdollah Amini. mixdes 2018: 154-159 [doi]

2016

An 8B/10B encoder with 2GHz operating frequencyHamed Ashrafi, Morteza Mousazadeh, Khayrollah Hadidi. mwscas 2016: 1-4 [doi]

2013

2011

A 500 MS/s 600 µW 300 µm:::2::: Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS ProcessSarang Kazeminia, Morteza Mousazadeh, Khayrollah Hadidi, Abdollah Khoei. ieicet, 94-C(4):635-640, 2011. [doi]

2010

High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejectionSarang Kazeminia, Morteza Mousazadeh, Khayrollah Hadidi, Abdollah Khoei. apccas 2010: 216-219 [doi]

A highly linear open-loop high-speed CMOS sample-and-holdMorteza Mousazadeh, Khayrollah Hadidi, Abdollah Khoei. apccas 2010: 228-231 [doi]

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