Rajendra Kumar Nagaria - researchr alias

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Viewing Publication 1 - 16 from 16

2025

2023

Anchor-based void detouring routing protocol in three dimensional IoT networksNaveen Kumar Gupta, Rama Shankar Yadav, Rajendra Kumar Nagaria, Deepak Gupta, Achyut Mani Tripathi, Om Jee Pandey. cn, 227:109691, May 2023. [doi]

Reduction of variation and leakage in wide fan-in OR Logic domino gateAnkur Kumar, Rajendra Kumar Nagaria. integration, 89:229-240, March 2023. [doi]

2021

An Angular 3D Path Selection Protocol in Wireless Sensor NetworksNaveen Kumar Gupta, Rama Shankar Yadav, Rajendra Kumar Nagaria, Deepak Gupta. cejcs, 11(1):190-207, 2021. [doi]

2020

Anchor Based Geographical Routing in WSNNaveen Kumar Gupta, Rama Shankar Yadav, Rajendra Kumar Nagaria. icsca 2020: 222-226 [doi]

3D geographical routing protocols in wireless ad hoc and sensor networks: an overviewNaveen Kumar Gupta, Rama Shankar Yadav, Rajendra Kumar Nagaria. winet, 26(4):2549-2566, 2020. [doi]

A Sub-1 V nanopower subthreshold current and voltage reference using current subtraction technique and cascoded active loadPratosh Kumar Pal, Rajendra Kumar Nagaria. integration, 71:115-124, 2020. [doi]

2019

Energy Efficient Angle based Route Selection in 3D Wireless Sensor NetworksNaveen Kumar Gupta, Rama Shankar Yadav, Rajendra Kumar Nagaria. sice 2019: 388-393 [doi]

A Low-Power, Sub-1-V All-MOSFET Subthreshold Voltage Reference Using Body BiasingPratosh Kumar Pal, Rajendra Kumar Nagaria. jcsc, 28(13), 2019. [doi]

2015

A Review on Robust Low Power System Level Digital Circuit Design Approaches in Nano-CMOS TechnologiesSankit R. Kassa, Rajendra Kumar Nagaria. iccct 2015: 371-375 [doi]

2013

Low-Power Adiabatic Computing with Improved Quasistatic Energy Recovery LogicShipra Upadhyay, Rajendra Kumar Nagaria, Ram Awadh Mishra. vlsi, 2013, 2013. [doi]

2012

Performance Analysis of High Speed Hybrid CMOS Full Adder Circuits for Low Voltage VLSI DesignSubodh Wairya, Rajendra Kumar Nagaria, Sudarshan Tiwari. vlsi, 2012, 2012. [doi]

2010

On the New Design of sinusoid voltage Controlled oscillators Using Multiplier in CFA-Based Double Integrator LoopRajendra Kumar Nagaria, Rakesh Kumar Singh, Subodh Wairya. jcsc, 19(5):939-948, 2010. [doi]

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