Santiago González Pestana - researchr alias

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Viewing Publication 1 - 5 from 5

2006

An Integrated, Low-Power Processor for Image Signal ProcessingEdwin van Dalen, Santiago González Pestana, Antoine van Wel. ism 2006: 501-508 [doi]

2005

A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and VerificationKees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema. date 2005: 1182-1187 [doi]

An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configurationAndrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees G. W. Goossens. tcad, 24(1):4-17, 2005. [doi]

2004

Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based ApproachSantiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees G. W. Goossens, Om Prakash Gangwal. date 2004: 764-769 [doi]

2002

Hand shape identification using neural networksKaren O. Egiazarian, Santiago González Pestana. ipas 2002: 440-448 [doi]

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