Steven Wallace - researchr alias

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Viewing Publication 1 - 21 from 21

2022

Comparing Management of IT and Analytics Projects: A Qualitative StudySteven Wallace, Lakshmi S. Iyer, Charlie Chen. amcis 2022: [doi]

2020

An Extended TOE Framework for Cybersecurity-adoption DecisionsSteven Wallace, Karen Y. Green, Catherine Johnson, Joseph Cooper, Collin Gilstrap. cais, 47:20, 2020. [doi]

2016

A Research Framework for Business Sustainability using Information Exchange - A Firm Centric PerspectiveSandeep Jagani, Steven Wallace, Anand Kunnathur. amcis 2016: [doi]

2013

Structural Stability and Virtual Team ConflictSteven Wallace, Donald Heath, Rahul Singh. hicss 2013: 640-648 [doi]

2012

Understanding Emergent Processes within New Product Development TeamsSteven Wallace, Nir Kshetri. amcis 2012: [doi]

2011

Structural Stability and Virtual Team PerformanceDonald Heath, Steven Wallace, Hamid Nemati, Rahul Singh. amcis 2011: [doi]

Developing product innovation using Web 2.0: A field studySteven Wallace, Jai Ganesh, Ajay Kolhatkar, Rahul Singh. amcis 2011: [doi]

2007

SuperPin: Parallelizing Dynamic Instrumentation for Real-Time PerformanceSteven Wallace, Kim M. Hazelwood. CGO 2007: 209-220 [doi]

2005

Pin: building customized program analysis tools with dynamic instrumentationChi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood. PLDI 2005: 190-200 [doi]

2003

The rationale of the current optical networking initiativesCees de Laat, Erik Radius, Steven Wallace. fgcs, 19(6):999-1008, 2003. [doi]

2002

Asim: A Performance Model FrameworkJoel S. Emer, Pritpal Ahuja, Eric Borch, Artur Klauser, Chi-Keung Luk, Srilatha Manne, Shubhendu S. Mukherjee, Harish Patil, Steven Wallace, Nathan L. Binkert, Roger Espasa, Toni Juan. Computer, 35(2):68-76, 2002. [doi]

1999

Instruction Recycling on a Multiple-Path ProcessorSteven Wallace, Dean M. Tullsen, Brad Calder. hpca 1999: 44-53 [doi]

1998

Modeled and Measured Instruction Fetching Performance for Superscalar MicroprocessorsSteven Wallace, Nader Bagherzadeh. tpds, 9(6):570-578, 1998. [doi]

A scalable register file architecture for superscalar processorsSteven Wallace, Nader Bagherzadeh. mam, 22(1):49-60, 1998. [doi]

Threaded Multiple Path ExecutionSteven Wallace, Brad Calder, Dean M. Tullsen. isca 1998: 238-249 [doi]

1997

Multiple Branch and Block PredictionSteven Wallace, Nader Bagherzadeh. hpca 1997: 94 [doi]

1996

Instruction Fetching Mechanisms for Superscalar MicroprocessorsSteven Wallace, Nader Bagherzadeh. europar 1996: 747-756

A scalable register file architecture for dynamically scheduled processorsSteven Wallace, Nader Bagherzadeh. IEEEpact 1996: 179-184 [doi]

1995

Performance issues of a superscalar microprocessorSteven Wallace, Nader Bagherzadeh. mam, 19(4):187-199, 1995. [doi]

Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessorSteven Wallace, Nirav Dagli, Nader Bagherzadeh. iccd 1995: 96-101 [doi]

1994

Performance Issues of a Superscalar MicroprocessorSteven Wallace, Nader Bagherzadeh. icpp 1994: 293-297

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