| 2 | -- | 3 | . Conference Reports |
| 4 | -- | 5 | . Book Review |
| 6 | -- | 7 | Pinaki Mazumder, John P. Hayes. Guest Editor s Introduction: Testing and Improving the Testability of Multimegabit Memories |
| 8 | -- | 14 | A. J. van de Goor. Using March Tests to Test SRAMs |
| 15 | -- | 19 | Michihiro Inoue, Toshio Yamada, Atsushi Fujiwara. A New Testing Acceleration Chip for Low-Cost Memory Tests |
| 20 | -- | 28 | Prathima Agrawal, Vishwani D. Agrawal, Sharad C. Seth. Generating Tests for Delay Faults in Nonscan Circuits |
| 30 | -- | 35 | Biswadip Mitra, Preeti Ranjan Panda, Parimal Pal Chaudhuri. Estimating the Complexity of Synthesized Designs from FSM Specifications |
| 36 | -- | 41 | B. Naveen, K. S. Raghunathan. An Automatic Netlist-to-Schematic Generator |
| 42 | -- | 51 | Peter C. Maxwell, Robert C. Aitken. Test Sets and Reject Rates: All Fault Coverages are Not Created Equal |
| 52 | -- | 66 | William R. Simpson, John W. Sheppard. Fault Isolation in an Integrated Diagnostic Environment |
| 67 | -- | 72 | Karl R. Umstadter, Don L. Millard, Robert C. Block. Applications of a Laser-Induced Plasma Pathway to Testing of Electronic Modules |
| 73 | -- | 82 | Vishwani D. Agrawal, Charles R. Kime, Kewal K. Saluja. A Tutorial on Built-in Self-Test. I. Principles |
| 83 | -- | 91 | . A D&T Roundtable |
| 92 | -- | 93 | . TTTC Newsletter |
| 94 | -- | 95 | . DATC Newsletter |