External Links

    Journal: IEEE Design & Test of Computers

    Volume 13, Issue 1

    2 -- 0John W. Sheppard. SCC20 attracts IEC participation
    3 -- 4Masaharu Imai, Eugenio Villar. ASPDAC 1995: HDL synthesizability and interoperability
    5 -- 7Yervant Zorian, Jan Hlavicka. Guest Editors Introduction: East Meets West
    8 -- 15Tibor Bartos, Norbert Fristacky. Verifying Timing Consistency in Formal Specifications
    16 -- 25Stanislaw J. Piestrak. Self-Checking Design in Eastern Europe
    26 -- 35Anatoly Prihozhy. Net Scheduling in High-Level Synthesis
    36 -- 46Sergiu Radu, Viorel Onofrei, Mihai Albulet. Interconnection Problems in Modern Computers
    48 -- 57Raimund Ubar. Test Synthesis with Alternative Graphs
    58 -- 63Mick Tegethoff, Tom Chen. Sensitivity Analysis of Critical Parameters in Board Test
    64 -- 69Joseph A. Mielke. Frequency Domain Testing of ADCs
    70 -- 78Peter H. Schneider, Ulf Schlichtmann, Bernd Wurth. Fast Power Estimation of Large Circuits
    79 -- 81Kenneth M. Thompson. Intel and the Myths of Test
    82 -- 83. IEEE Design & Test of Computers
    84 -- 85. Design Automation Technical Committee Newsletter
    86 -- 87. Test Technology Tc Newsletter
    88 -- 0Scott Davidson. Base 1 logic: A method for environmentally friendly PC design
    runs on