0 | -- | 91 | Wojciech Maly. The future of IC design, testing, and manufacturing |
3 | -- | 0 | . News |
5 | -- | 0 | Bernard Courtois. Second Therminic Workshop |
6 | -- | 7 | Harold S. Stone. Designing in the multimedia era |
9 | -- | 15 | Stephen Dean Brown. FPGA Architectural Research: A Survey |
16 | -- | 23 | Stephen Dean Brown, Muhammad M. Khellah, Zvonko G. Vranesic. Minimizing FPGA Interconnect Delays |
24 | -- | 33 | Todd A. DeLong, Barry W. Johnson, Joseph A. Profeta III. A Fault Injection Technique for VHDL Behavioral-Level Models |
34 | -- | 39 | Jacob M. Velixon. Transmission Coefficient Correction for DACs |
40 | -- | 49 | Karim Arabi, Bozena Kaminska, Janusz Rzeszut. BIST for D/A and A/D Converters |
50 | -- | 60 | Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda. Circular Self-Test Path for FSMs |
61 | -- | 65 | Jerry M. Soden, Charles F. Hawkins. IDDQ Testing: Issues Present and Future |
66 | -- | 73 | Koji Nakamae, Homare Sakamoto, Hiromu Fujioka. How ATE Planning Affects LSI Manufacturing Cost |
74 | -- | 81 | . A D&T Roundtable: Telecommunications System Design |
82 | -- | 85 | . IEEE Design & Test of Computers 1996 Annual Index, Volume 13 |
86 | -- | 87 | . Author Guidelines IEEE Design & Test of Computers |
93 | -- | 0 | . Design Automation Technical Committee Newsletter |
94 | -- | 95 | . Test Technology Tc Newsletter |
96 | -- | 0 | Robert C. Aitken. When tools cry wolf: Testability pitfalls of synthesized designs |