Harald P. E. Vranken - researchr alias

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Viewing Publication 1 - 36 from 36

2019

A Virtual Classroom for Cybersecurity EducationJens Haag, Harald P. E. Vranken, Marko C. J. D. van Eekelen. tedu, 15:173-208, 2019. [doi]

2018

2017

A Survey of Authentication and Communications Security in Online BankingSven Kiljan, Koen Simoens, Danny De Cock, Marko C. J. D. van Eekelen, Harald P. E. Vranken. ACM Comput. Surv., 49(4), 2017. [doi]

2016

User-friendly Manual Transfer of Authenticated Online Banking Transaction Data - A Case Study that Applies the What You Enter Is What You Sign Transaction Authorization Information SchemeSven Kiljan, Harald P. E. Vranken, Marko C. J. D. van Eekelen. secrypt 2016: 259-270 [doi]

The Role of Internet Service Providers in Botnet MitigationJeroen Pijpker, Harald P. E. Vranken. eisic 2016: 24-31 [doi]

2014

2013

Counter botnet activities in the Netherlands a study on organisation and effectivenessTimo Schless, Harald P. E. Vranken. icitst 2013: 437-442 [doi]

2011

A distributed virtual computer security lab with central authorityJens Haag, Tobias Horsmann, Stefan Karsch, Harald P. E. Vranken. cserc 2011: 89-95 [doi]

The Impact of Server Virtualization on ITIL ProcessesJurriaan Kamer, Harald P. E. Vranken. closer 2011: 643-649

A Distributed Virtual Computer Security LabHarald P. E. Vranken, Jens Haag, Tobias Horsmann, Stefan Karsch. csedu 2011: 110-119

2008

Experiences with a synchronous virtual classroom in distance educationHerman Koppelman, Harald P. E. Vranken. iticse 2008: 194-198 [doi]

2006

Fault detection and diagnosis with parity trees for space compaction of test responsesHarald P. E. Vranken, Sandeep Kumar Goel, Andreas Glowatz, Jürgen Schlöffel, Friedrich Hapke. dac 2006: 1095-1098 [doi]

2004

2003

Yield analysis for repairable embedded memoriesAnuja Sehgal, Aishwarya Dubey, Erik Jan Marinissen, Clemens Wouters, Harald P. E. Vranken, Krishnendu Chakrabarty. ets 2003: 35-40 [doi]

ATPG Padding And ATE Vector Repeat Per Port For Reducing Test Data VolumeHarald P. E. Vranken, Friedrich Hapke, Soenke Rogge, Domenico Chindamo, Erik H. Volkerink. itc 2003: 1069-1078 [doi]

2002

Enhanced Reduced Pin-Count Test for Full-Scan DesignHarald P. E. Vranken, Tom Waayers, Hérvé Fleury, David Lelouvier. et, 18(2):129-143, 2002. [doi]

Combining deterministic logic BIST with test point insertionHarald P. E. Vranken, Florian Meister, Hans-Joachim Wunderlich. ets 2002: 105-110 [doi]

2001

2000

1999

TriMedia CPU64 ArchitectureJos T. J. van Eijndhoven, Kees A. Vissers, Evert-Jan D. Pol, P. Struik, R. H. J. Bloks, Pieter van der Wolf, Harald P. E. Vranken, Frans Sijstermans, M. J. A. Tromp, Andy D. Pimentel. iccd 1999: 586-592 [doi]

1997

Design-For-Debug in Hardware/Software Co-DesignHarald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers. codes 1997: 35-42 [doi]

1996

Design for Testability in Hardware-Software SystemsHarald P. E. Vranken, Marc F. Witteman, Ronald C. van Wuijtswinkel. dt, 13(3):79-87, 1996. [doi]

1994

System-Level Testability of Hardware/Software SystemsHarald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers, J. H. M. M. van Rhee. itc 1994: 134-142

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