Valentin Gherman - researchr alias

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Viewing Publication 1 - 24 from 24

2023

2020

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic CircuitsBastien Deveautour, Arnaud Virazel, Patrick Girard 0001, Valentin Gherman. et, 36(1):33-46, 2020. [doi]

Binary Linear ECCs Optimized for Bit Inversion in Memories with Asymmetric Error ProbabilitiesValentin Gherman, Samuel Evain, Bastien Giraud. date 2020: 298-301 [doi]

2018

Is aproximate computing suitable for selective hardening of arithmetic circuits?Bastien Deveautour, Arnaud Virazel, P. Girard, Serge Pravossoudovitch, Valentin Gherman. dtis 2018: 1-6 [doi]

Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cellsEmna Farjallah, Valentin Gherman, Jean-Marc Armani, Luigi Dilillo. dtis 2018: 1-5 [doi]

2017

2014

2013

Error-correction schemes with erasure information for fast memoriesSamuel Evain, Valentin Gherman. ets 2013: 1-6 [doi]

Memory Reliability Improvement Based on Maximized Error-Correcting CodesValentin Gherman, Samuel Evain, Yannick Bonhomme. et, 29(4):601-608, 2013. [doi]

Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detectionSébastien Sarrazin, Samuel Evain, Lirida Alves de Barros Naviner, Yannick Bonhomme, Valentin Gherman. date 2013: 1077-1082 [doi]

2012

Memory reliability improvements based on maximized error-correcting codesValentin Gherman, Samuel Evain, Yannick Bonhomme. ets 2012: 1-6 [doi]

2011

2010

Programmable restricted SEC codes to mask permanent faults in semiconductor memoriesSamuel Evain, Yannick Bonhomme, Valentin Gherman. iolts 2010: 147-153 [doi]

2009

System-level hardware-based protection of memories against soft-errorsValentin Gherman, Samuel Evain, Mickael Cartron, Nathaniel Seymour, Yannick Bonhomme. date 2009: 1222-1225 [doi]

2007

Synthesis of irregular combinational functions with large don t care setsValentin Gherman, Hans-Joachim Wunderlich, R. D. Mascarenhas, Jürgen Schlöffel, Michael Garbers. glvlsi 2007: 287-292 [doi]

Deterministic logic BIST for transition fault testingValentin Gherman, Hans-Joachim Wunderlich, Jürgen Schlöffel, Michael Garbers. iet-cdt, 1(3):180-186, 2007. [doi]

2006

Deterministic Logic BIST for Transition Fault TestingValentin Gherman, Hans-Joachim Wunderlich, Jürgen Schlöffel, Michael Garbers. emnets 2006: 123-130 [doi]

2005

Implementing a Scheme for External Deterministic Self-TestAbdul Wahid Hakmi, Hans-Joachim Wunderlich, Valentin Gherman, Michael Garbers, Jürgen Schlöffel. vts 2005: 101-106 [doi]

2004

Efficient Pattern Mapping for Deterministic Logic BISTValentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers. itc 2003: 48-56 [doi]

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