Journal: IEEE Design & Test of Computers

Volume 19, Issue 6

0 -- 0Peter J. Ashenden. Standards: Technical activities in Accellera
3 -- 0Rajesh Gupta. EIC Message: The Neglected Community
4 -- 5Grant Martin. Guest Editor s Introduction: The Reuse of Complex Architectures
6 -- 16Andrew Mihal, Chidamber Kulkarni, Matthew W. Moskewicz, Mel M. Tsai, Niraj Shah, Scott J. Weber, Yujia Jin, Kurt Keutzer, Christian Sauer, Kees A. Vissers, Sharad Malik. Developing Architectural Platforms: A Disciplined Approach
17 -- 26Pierre G. Paulin, Chuck Pilkington, Essaid Bensoudane. StepNP: A System-Level Exploration Platform for Network Processors
27 -- 35Clifford Liem, Francois Breant, Sarveta Jadhav, Ray O Farrell, Ray Ryan, Oz Levia. Embedded Tools for a Configurable and Customizable DSP Architecture
36 -- 43Greg Stitt, Frank Vahid. Energy Advantages of Microprocessor Platforms with On-Chip Configurable Logic
44 -- 51Vincent John Mooney III, Douglas M. Blough. A Hardware-Software Real-Time Operating System Framework for SoCs
52 -- 63Wander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava. Multiprocessor SoC Platforms: A Component-Based Design Approach
64 -- 72Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas. Practical Oscillation-Based Test of Integrated Filters
73 -- 82Gloria Huertas, Diego Vázquez, Eduardo J. Peralías, Adoración Rueda, José Luis Huertas. Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell
83 -- 89Michel Renovell, Florence Azaïs, Yves Bertrand. Improving Defect Detection in Static-Voltage Testing
90 -- 100Amit Chowdhary, Rajesh K. Gupta. A Methodology for Synthesis of Data Path Circuitse
101 -- 0. Conference Reports
102 -- 103. Panel Summaries
104 -- 105Andrew B. Kahng. The Road Ahead: The significance of packaging
108 -- 109. TTTC Newsletter
110 -- 119. Annual Index
120 -- 0. The Last Byte