| 300 | -- | 0 | Tim Cheng. Design and CAD for Nanotechnologies |
| 302 | -- | 303 | Fabrizio Lombardi, Cecilia Metra. Guest Editors Introduction: The State of the Art in Nanoscale CAD |
| 304 | -- | 311 | Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi. An Overview of Nanoscale Devices and Circuits |
| 312 | -- | 321 | Smita Krishnaswamy, Igor L. Markov, John P. Hayes. Tracking Uncertainty with Probabilistic Logic Circuit Testing |
| 322 | -- | 330 | Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park. Leakage Minimization Technique for Nanoscale CMOS VLSI |
| 332 | -- | 339 | Salem Abdennadher, Saghir A. Shaikh. Practices in Mixed-Signal and RF IC Testing |
| 340 | -- | 350 | Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika F. Cota, Luigi Carro. Crosstalk- and SEU-Aware Networks on Chips |
| 352 | -- | 361 | Federico Di Palma, Giuseppe De Nicolao, Guido Miraglia, Oliver M. Donzelli. ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis |
| 362 | -- | 372 | Donghwi Lee, Erik H. Volkerink, Intaik Park, Jeff Rearick. Empirical Validation of Yield Recovery Using Idle-Cycle Insertion |
| 374 | -- | 384 | V. R. Devanathan, C. P. Ravikumar, V. Kamakoti. Variation-Tolerant, Power-Safe Pattern Generation |
| 386 | -- | 396 | Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu. Raisin: Redundancy Analysis Algorithm Simulation |
| 402 | -- | 403 | Sachin S. Sapatnekar. Book Review: An Assay of Biochips |
| 404 | -- | 405 | Joe Damore. DATC Newsletter |
| 407 | -- | 0 | Bruce C. Kim. TTTC Newsletter |
| 408 | -- | 0 | Scott Davidson. How do we train today s students to become tomorrow s engineers? |