Journal: IEEE Design & Test of Computers

Volume 24, Issue 6

516 -- 0Tim Cheng. Trustworthy ICs for secure embedded computing
518 -- 520Patrick Schaumont, Anand Raghunathan. Guest Editors Introduction: Security and Trust in Embedded-Systems Design
522 -- 533Thomas Eisenbarth, Sandeep Kumar, Christof Paar, Axel Poschmann, Leif Uhsadel. A Survey of Lightweight-Cryptography Implementations
534 -- 0Kevin Schutz. OEM Component Authentication
535 -- 543Thomas Popp, Stefan Mangard, Elisabeth Oswald. Power Analysis Attacks and Countermeasures
544 -- 545Chong Hee Kim, Jean-Jacques Quisquater. Faults, Injection Methods, and Fault Attacks
546 -- 555Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu. Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors
556 -- 569Hamad Alrimeih, Daler N. Rakhmatov. Security-Performance Trade-offs in Embedded Systems Using Flexible ECC Hardware
570 -- 580G. Edward Suh, Charles W. O Donnell, Srinivas Devadas. Aegis: A Single-Chip Secure Processor
581 -- 0Steve Trimberger. Security in SRAM FPGAs
582 -- 591Peter Wilson, Alexandre Frey, Tom Mihm, Danny Kershaw, Tiago Alves. Implementing Embedded Security on Dual-Virtual-CPU Systems
592 -- 0Tom Mihm. Protecting Critical Data
594 -- 595Victor Berman. DASC standards track IP-based design trends
596 -- 597Grant Martin. Making a List...Checking it Twice
603 -- 0Joe Damore. DATC Newsletter
605 -- 0Bruce C. Kim. TTTC Newsletter
624 -- 0Mel Breuer. Tesla and AND gates

Volume 24, Issue 5

412 -- 0Tim Cheng. Combining synchronous and asynchronous timing schemes for high-performance systems
414 -- 416Michael Kishinevsky, Sandeep K. Shukla, Ken S. Stevens. Guest Editors Introduction: GALS Design and Validation
418 -- 428Paul Teehan, Mark R. Greenstreet, Guy Lemieux. A Survey and Taxonomy of GALS Design Styles
430 -- 441Milos Krstic, Eckhard Grass, Frank K. Gürkaynak, Pascal Vivet. Globally Asynchronous, Locally Synchronous Circuits: Overview and Outlook
442 -- 452Mario R. Casu, Luca Macchiarulo. Adaptive Latency-Insensitive Protocols
454 -- 463Luis A. Plana, Stephen B. Furber, Steve Temple, Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang. A GALS Infrastructure for a Massively Parallel Multiprocessor
464 -- 472Tejpal Singh, Alexander Taubin. A Highly Scalable GALS Crossbar Using Token Ring Arbitration
474 -- 475Anne Gattiker. Guest Editor s Introduction: Getting More Out of Test
476 -- 485Jerzy Tyszer, Janusz Rajski, Grzegorz Mrugalski, Nilanjan Mukherjee, Mark Kassab, Wu-Tung Cheng, Manish Sharma, Liyang Lai. X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis
486 -- 493Mack W. Riley, Mike Genden. Cell Broadband Engine Debugging for Unknown Events
494 -- 501Scott Davidson, Helen Davidson. The Psychology of Electronic Test
502 -- 504Sachin S. Sapatnekar, Leon Stok. DAC Highlights
505 -- 0Joe Damore. DATC Newsletter
506 -- 507Scott Davidson. Book Reviews: Test Tutorials in Book Form
510 -- 0Erik Jan Marinissen, Axel Jantsch, Nicola Nicolici. DATE 07 workshop on diagnostic services in NoCs
511 -- 0Bruce C. Kim. TTTC Newsletter
512 -- 0Jill Sibert. ITC exhibits for fun and profit

Volume 24, Issue 4

300 -- 0Tim Cheng. Design and CAD for Nanotechnologies
302 -- 303Fabrizio Lombardi, Cecilia Metra. Guest Editors Introduction: The State of the Art in Nanoscale CAD
304 -- 311Jing Huang, Mariam Momenzadeh, Fabrizio Lombardi. An Overview of Nanoscale Devices and Circuits
312 -- 321Smita Krishnaswamy, Igor L. Markov, John P. Hayes. Tracking Uncertainty with Probabilistic Logic Circuit Testing
322 -- 330Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park. Leakage Minimization Technique for Nanoscale CMOS VLSI
332 -- 339Salem Abdennadher, Saghir A. Shaikh. Practices in Mixed-Signal and RF IC Testing
340 -- 350Arthur Pereira Frantz, Maico Cassel, Fernanda Lima Kastensmidt, Érika F. Cota, Luigi Carro. Crosstalk- and SEU-Aware Networks on Chips
352 -- 361Federico Di Palma, Giuseppe De Nicolao, Guido Miraglia, Oliver M. Donzelli. ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis
362 -- 372Donghwi Lee, Erik H. Volkerink, Intaik Park, Jeff Rearick. Empirical Validation of Yield Recovery Using Idle-Cycle Insertion
374 -- 384V. R. Devanathan, C. P. Ravikumar, V. Kamakoti. Variation-Tolerant, Power-Safe Pattern Generation
386 -- 396Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu. Raisin: Redundancy Analysis Algorithm Simulation
402 -- 403Sachin S. Sapatnekar. Book Review: An Assay of Biochips
404 -- 405Joe Damore. DATC Newsletter
407 -- 0Bruce C. Kim. TTTC Newsletter
408 -- 0Scott Davidson. How do we train today s students to become tomorrow s engineers?

Volume 24, Issue 3

212 -- 0Tim Cheng. Supporting cost-effective innovation
214 -- 215Mohammad Tehranipoor, Kenneth M. Butler. Guest Editors Introduction: IR Drop in Very Deep-Submicron Designs
216 -- 224Zahi S. Abuhamdeh, Bob Hannagan, Jeff Remmers, Alfred L. Crouch. A Production IR-Drop Screen on a Chip
226 -- 234Jing Wang, Duncan M. Hank Walker, Xiang Lu, Ananta K. Majhi, Bram Kruseman, Guido Gronthoud, Luis Elvira Villagra, Paul J. A. M. van de Wiel, Stefan Eichenberger. Modeling Power Supply Noise in Delay Testing
236 -- 244Karim Arabi, Resve A. Saleh, Xiongfei Meng. Power Supply Noise in SoCs: Metrics, Management, and Measurement
246 -- 254Sanjay Pant, Eli Chiprout, David Blaauw. Power Grid Physics and Implications for CAD
256 -- 266Praveen Ghanta, Sarma B. K. Vrudhula. Analysis of Power Supply Noise in the Presence of Process Variations
268 -- 275Santiago Remersaro, Xijiang Lin, Sudhakar M. Reddy, Irith Pomeranz, Janusz Rajski. Scan-Based Tests with Low Switching Activity
276 -- 284Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker. Power Droop Testing
286 -- 287Grant Martin. Everything but the kitchen sink
291 -- 0Joe Damore. DATC Newsletter
292 -- 0Bruce C. Kim. TTTC Newsletter
296 -- 0T. M. Mak. The case for power with test

Volume 24, Issue 2

108 -- 0Tim Cheng. Cocktail approach to functional verification
110 -- 111Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang. Guest Editors Introduction: Attacking Functional Verification through Hybrid Techniques
112 -- 122Jayanta Bhadra, Magdy S. Abadir, Li-C. Wang, Sandip Ray. A Survey of Hybrid Techniques for Functional Verification
124 -- 131Praveen Tiwari, Raj S. Mitra. Hybrid Verification of Protocol Bridges
132 -- 139Sandip Ray, Rob Sumners. Combining Theorem Proving with Model Checking through Predicate Abstraction
140 -- 152Nicola Bombieri, Franco Fummi, Graziano Pravadelli, Andrea Fedeli. Hybrid, Incremental Assertion-Based Verification for TLM Design Flows
154 -- 162Chin-Lung Chuang, Wei-Hsiang Cheng, Dong-Jung Lu, Chien-Nan Jimmy Liu. Hybrid Approach to Faster Functional Verification with Full Visibility
164 -- 172Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu. Economic Aspects of Memory Built-in Self-Repair
174 -- 183Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne Wolf. Roundtable: Envisioning the Future for Multiprocessor SoC
184 -- 192. FSA SiP Market and Patent Analysis Report
193 -- 196Priyadarsan Patra. On the cusp of a validation wall
197 -- 0Bruce C. Kim. Test Technology TC Newsletter
198 -- 199Scott Davidson. A textbook with two target audiences
202 -- 203C. P. Ravikumar, Jari Nurmi. Conference Reports
207 -- 0Joe Damore. DATC Newsletter
208 -- 0Scott Davidson. Losing control

Volume 24, Issue 1

4 -- 0Tim Cheng. Moore s law meets the life sciences
6 -- 7Aart J. de Geus. A. Richard Newton: Technologist with a Mission
8 -- 9Krishnendu Chakrabarty, Roland Thewes. Guest Editors Introduction: Biochips and Integrated Biosensor Platforms
10 -- 24Richard B. Fair, Andrey Khlystov, Tina D. Tailor, Vladislav Ivanov, Randall D. Evans, Vijay Srinivasan, Vamsee K. Pamula, Michael G. Pollack, Peter B. Griffin, Jack Zhou. Chemical and Biological Applications of Digital-Microfluidic Devices
26 -- 36Gianni Medoro, Roberto Guerrieri, Nicolò Manaresi, Claudio Nastruzzi, Roberto Gambari. Lab on a Chip for Live-Cell Manipulation
38 -- 48Luca Benini, Carlotta Guiducci, Christian Paulus. Electronic Detection of DNA Hybridization: Toward CMOS Microarrays
50 -- 58S. Krishnamoorthy, J. J. Feng, Z. J. Chen. Simulation-Based Analysis of Dielectrophoretic Field Flow Fractionation Devices
60 -- 70Fei Su, Jun Zeng. Computer-Aided Design and Test for Digital Microfluidics
72 -- 82Hans G. Kerkhoff. Testing Microelectronic Biofluidic Systems
83 -- 93Andrew B. Kahng, Ira Chayut, John M. Cohn, Toshihiro Hattori, Jeong-Taek Kong, Pierre G. Paulin, Rich Tobias. Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs
94 -- 96Carol Stolicny. ITC 2006 panels
97 -- 0Bruce C. Kim. TTTC Newsletter
98 -- 99Victor Berman. Conflicting International Standards Pressure Chip Designers
102 -- 103Reinaldo A. Bergamaschi. Embedded Systems Week
103 -- 0Joe Damore. DATC Newsletter
104 -- 0Scott Davidson. A laboratory right under your nose