Journal: IEEE Design & Test of Computers

Volume 35, Issue 1

4 -- 0Jörg Henkel. Design and Test of Energy-Efficient, High-Performance, and Secure Computing Technologies via Accelerators
5 -- 6Mustafa Ozdal, Gi-Joon Nam, Debbie Marr. Guest Editors' Introduction: Hardware Accelerators for Data Centers
7 -- 15Christian Brugger, Valentin Grigorovici, Matthias Jung 0001, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig. A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs
16 -- 22Jason Cong, Zhenman Fang, Muhuan Huang, Libo Wang, Di Wu 0010. CPU-FPGA Coscheduling for Big Data Applications
23 -- 29Naif Tarafdar, Nariman Eskandari, Thomas Lin, Paul Chow. Designing for FPGAs in the Cloud
30 -- 38Boeui Hong, Han-Yee Kim, Minsu Kim, Taeweon Suh, Lei Xu 0012, Weidong Shi. FASTEN: An FPGA-Based Secure System for Big Data Processing
39 -- 46Dongyoung Kim, Junwhan Ahn, Sungjoo Yoo. ZeNA: Zero-Aware Neural Network Accelerator
47 -- 54Muhammet Mustafa Ozdal. Emerging Accelerator Platforms for Data Centers
55 -- 62Young-Ho Gong, Jae Jeong Yoo, Sung Woo Chung. Thermal Modeling and Validation of a Real-World Mobile AP
63 -- 73Yen-Long Lee, Yu-Po Cheng, Soon-Jyh Chang, Hsin-Wen Ting. A Fast and Jitter-Modulation Free Jitter Tolerance Estimation Technique for Bang- Bang CDRs
74 -- 89Elke De Mulder, Thomas Eisenbarth, Patrick Schaumont. Identifying and Eliminating Side-Channel Leaks in Programmable Systems
90 -- 94Dimitrios N. Serpanos. Secure and Resilient Industrial Control Systems
95 -- 96Lothar Thiele, Soonhoi Ha. The 2017 Embedded Systems Week (ESWEEK)
97 -- 98Ibrahim Abe M. Elfadel, H. Fatih Ugurdag. 25th IFIP/IEEE Conference on Very Large Scale Integration (VLSI-SoC 2017)
99 -- 101José L. Ayala. CEDA Currents
102 -- 103Theo Theocharides. TTTC Newsletter
104 -- 0Scott Davidson. Technobabble