Journal: IEEE Design & Test of Computers

Volume 39, Issue 6

4 -- 0Partha Pratim Pande. Special Issue on NOCS 2022
5 -- 15Hao Luan, Yu Yao, Chang Huang. A Many-Ported and Shared Memory Architecture for High-Performance ADAS SoCs
16 -- 27Uday Mallappa, Chung-Kuan Cheng, Bill Lin 0001. JARVA: Joint Application-Aware Oblivious Routing and Static Virtual Channel Allocation
28 -- 38Chamika Sudusinghe, Subodha Charles, Sapumal Ahangama, Prabhat Mishra 0001. Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures
39 -- 47Bharat Bisht, Shirshendu Das. BHT-NoC: Blaming Hardware Trojans in NoC Routers
48 -- 57Zhiqiang Chen, Rangyu Deng, Kun Zeng, Xiaoqiang Ni, Hongwei Zhou. Traversal Packets: Opportunistic Bypass Packets for Deadlock Recovery
58 -- 69Neiel Leyva, Alireza Monemi, Enrique Vallejo 0001. SynFull-RTL: Evaluation Methodology for RTL NoC Designs
70 -- 78Vida Sobhani, Kevin Kauth, Tim Stadtmann, Tobias Gemmeke. Deadlock-Freedom in Computational Neuroscience Simulators
79 -- 89Zhenmin Li, Yuqing Ma, Gaoming Du, Xiaolei Wang, Yukun Song, Duoli Zhang. RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC
90 -- 98Sudeep Pasricha, John Jose, Sujay Deb. Electronic, Wireless, and Photonic Network-on-Chip Security: Challenges and Countermeasures
99 -- 109Chixiao Chen, Jieming Yin, Yarui Peng, Maurizio Palesi, Wenxu Cao, Letian Huang, Amit Kumar Singh 0002, Haocong Zhi, Xiaohang Wang 0001. Design Challenges of Intrachiplet and Interchiplet Interconnection
110 -- 0Cláudio Machado Diniz, Bruno Zatt. Guest Editors' Introduction: SBCCI 2021
111 -- 118Freddy Gabbay, Avi Mendelson, Basel Salameh, Majd Ganaiem. A Design Flow and Tool for Avoiding Asymmetric Aging
119 -- 127Jiovana Sousa Gomes, Tulio Pereira Bitencourt, Sergio Bampi, Fábio Luís Livi Ramos. Low-Power High-Throughput Architecture for AV1 Arithmetic Decoder
128 -- 137Tulio Pereira Bitencourt, Fábio Luís Livi Ramos, Sergio Bampi. Power-Saving 8K Real-Time AV1 Arithmetic Encoder Architecture
138 -- 146Michael Guilherme Jordan, Guilherme Korol, Tiago Knorst, Mateus Beck Rutzig, Antonio Carlos Schneider Beck. ERIN: Energy-Aware Resource-Provisioning Framework for CPU-FPGA Multitenant Environment
147 -- 155Maria D. Vieira, Samuel S. H. Ng, Marcel Walter, Robert Wille, Konrad Walus, Ricardo S. Ferreira 0001, Omar P. Vilela Neto, José Augusto Miranda Nacif. Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots
156 -- 164M. Shafkat M. Khan, Chengjie Xi, Aslam A. Khan, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani. Secure Interposer-Based Heterogeneous Integration
165 -- 171Zhongbao Wang, Zihui Zhu, Shipeng Zhao, Hongmei Liu 0007, Shiqiang Fu, Shaojun Fang. Large Power Division Ratio Branch-Line Coupler With Differential Through and Differential to Single-Ended Coupling
172 -- 179Liton Kumar Biswas, Leonidas Lavdas, M. Tanjidur Rahman, Mark M. Tehranipoor, Navid Asadizanjani. On Backside Probing Techniques and Their Emerging Security Threats
180 -- 0Scott Davidson. Small Is Good