Journal: IEEE Design & Test of Computers

Volume 5, Issue 3

11 -- 21Peter M. Maurer. Design verification of the WE 32106 math accelerator unit
22 -- 30Charles E. Stroud, Ronald R. Munoz, David A. Pierce. Behavioral model synthesis with Cones
31 -- 42Sumit Ghosh. Behavioral-level fault simulation
43 -- 55Tom E. Kirkland, M. Ray Mercer. Algorithms for automatic test pattern generation
56 -- 63Robert J. Powers. Throughput advantages of asynchronous prober control