| 309 | -- | 0 | Shigetaka Takagi. Special Section on Analog Circuit Techniques and Related Topics |
| 310 | -- | 316 | Takayuki Kato, Keiichi Yamaguchi, Yasuhiko Kuriyama, Hiroshi Yoshida. A 4-mm-Square Miniaturized Doherty Power Amplifier Module for W-CDMA Mobile Terminals |
| 317 | -- | 325 | Takao Kihara, Gue Chol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi. Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier |
| 326 | -- | 332 | Tzung-Han Wu, Chinchun Meng. 10-GHz SiGe BiCMOS Sub-Harmonic Gilbert Mixer Using the Fully Symmetrical and Time-Delay Compensated LO Cells |
| 333 | -- | 338 | Hiroaki Tanabe, Hiroshi Tanimoto. Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts |
| 339 | -- | 350 | Ippei Akita, Kazuyuki Wada, Yoshiaki Tadokoro. Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators |
| 351 | -- | 357 | Daisuke Kobayashi, Shigetaka Takagi, Nobuo Fujii. Jitter Tolerant Continuous-Time Sigma-Delta A-D Converter Employing In-Loop Low-Pass Filter |
| 358 | -- | 364 | Shunsuke Okura, Tetsuro Okura, Bogoda A. Indika U. K., Kenji Taniguchi. A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC |
| 365 | -- | 371 | Takeshi Ueno, Takafumi Yamaji, Tetsuro Itakura. A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS |
| 372 | -- | 379 | Hiroto Suzuki, Kazuyuki Wada, Yoshiaki Tadokoro. Band Connections for Digital Substrate Noise Reduction Using Active Cancellation Circuits |
| 380 | -- | 387 | Daisuke Kosaka, Makoto Nagata, Yoshitaka Murasaka, Atsushi Iwata. Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits |
| 388 | -- | 397 | Takayuki Watanabe, Yuichi Tanji, Hidemasa Kubota, Hideki Asai. Fast Transient Simulation of Power Distribution Networks Containing Dispersion Based on Parallel-Distributed Leapfrog Algorithm |
| 398 | -- | 400 | Chinchun Meng, Jhin-Ci Jhong. 4-GHz Inter-Stage-Matched SiGe HBT LNA with Gain Enhancement and No Noise Figure Degradation |
| 401 | -- | 405 | Tzung-Han Wu, Chinchun Meng, Tse-Hung Wu, Guo-Wei Huang. A 5.2 GHz 47 dB Image Rejection Double Quadrature Gilbert Downconverter Using 0.35 µm SiGe HBT Technology |
| 406 | -- | 410 | Junji Kawata, Yousuke Taniguchi, Masayoshi Oda, Yoshihiro Yamagami, Yoshifumi Nishio, Akio Ushida. Spice-Oriented Frequency-Domain Analysis of Nonlinear Electronic Circuits |
| 411 | -- | 414 | Ming-Hong Lai, Chia-Chi Chu, Wu-Shiung Feng. On the Equivalent of Structure Preserving Reductions Approach and Adjoint Networks Approach for VLSI Interconnect Reductions |
| 415 | -- | 418 | Chia-Chi Chu, Ming-Hong Lai, Wu-Shiung Feng. Lyapunov-Based Error Estimations of MIMO Interconnect Reductions by Using the Global Arnoldi Algorithm |
| 419 | -- | 428 | Akira Tanaka, Hideyuki Imai, Masaaki Miyakoshi. A Unified Framework of Subspace Identification for D.O.A. Estimation |
| 429 | -- | 438 | Khairul Munadi, Masaaki Fujiyoshi, Kiyoshi Nishikawa, Hitoshi Kiya. Codeblock-Based Error Concealment for JPEG2000 Coded Image Transmission over RTP |
| 439 | -- | 447 | Yue-Dar Jou, Fu-Kun Chen. Design of FIR Digital Filters Using Hopfield Neural Network |
| 448 | -- | 456 | Takahiro Kabe, Sukanya Parui, Hiroyuki Torikai, Soumitro Banerjee, Toshimichi Saito. Analysis of Piecewise Constant Models of Current Mode Controlled DC-DC Converters |
| 457 | -- | 466 | Waihong Ng, Katsuhiko Kakehi. Cache Efficient Radix Sort for String Sorting |
| 467 | -- | 473 | Nobuyuki Tamura. On an Optimal Maintenance Policy for a Markovian Deteriorating System with Uncertain Repair |
| 474 | -- | 490 | SeongHan Shin, Kazukuni Kobara, Hideki Imai. An Efficient and Leakage-Resilient RSA-Based Authenticated Key Exchange Protocol with Tight Security Reduction |
| 491 | -- | 503 | Shigeaki Kuzuoka, Tomohiko Uyematsu. Universal Lossy Coding for Individual Sequences Based on Complexity Functions |
| 504 | -- | 510 | Tsung Sheng Kuo, Chau-Yun Hsu. Butterfly Structure for Viterbi Decoders of All Rates ::::k/n:::: |
| 511 | -- | 516 | Chih-Peng Fan, Yu-Lian Lin. Implementations of Low-Cost Hardware Sharing Architectures for Fast 8 x 8 and 4 x 4 Integer Transforms in H.264/AVC |
| 517 | -- | 522 | Hidetoshi Oya, Kojiro Hagino, Masaki Matsuoka. Observer-Based Robust Tracking Control with Preview Action for Uncertain Discrete-Time Systems |
| 523 | -- | 525 | Zhonghua Quan, Soo Hee Han, Wook Hyun Kwon. Stability-Guaranteed Horizon Size for Receding Horizon Control |
| 526 | -- | 530 | Wakaha Ogata, Naoya Matsumoto. Comments on the Security Proofs of Some Signature Schemes Based on Factorization |
| 531 | -- | 534 | Shinya Miyamoto, Kenta Kasai, Kohichi Sakaniwa. Sufficient Conditions for a Regular LDPC Code Better than an Irregular LDPC Code |
| 535 | -- | 538 | Hideyuki Torii, Makoto Nakamura. Enhancement of ZCZ Sequence Set Construction Procedure |
| 539 | -- | 541 | Young-Ho Park, Hwangjun Song, KyungKeun Lee, CheolSoo Kim, Sanggon Lee, Sang-Jae Moon. Secure Route Discovery Protocol for Ad Hoc Networks |