Journal: IEICE Transactions

Volume 96-A, Issue 12

2323 -- 0Tadashi Wadayama. Foreword
2324 -- 2331Tetsunao Matsuta, Tomohiko Uyematsu. Random-Coding Exponential Error Bounds for Channels with Action-Dependent States
2332 -- 2342Mitsuharu Arimura, Hiroki Koga, Ken-ichi Iwata. Redundancy-Optimal FF Codes for a General Source and Its Relationships to the Rate-Optimal FF Codes
2343 -- 2350Takahiro Ota, Hiroyoshi Morita, Adriaan J. de Lind van Wijngaarden. Real-Time and Memory-Efficient Arrhythmia Detection in ECG Monitors Using Antidictionary Coding
2351 -- 2359Haruhiko Kaneko. Periodic Pattern Coding for Last Level Cache Data Compression
2360 -- 2367Michael Joseph Tan, Yuichi Kaji. Flash Code Utilizing Binary-Indexed Slice Encoding and Resizable-Clusters
2368 -- 2373Shan Lu, Jun Cheng, Yoichiro Watanabe. k+1)-Ary Error-Correcting Signature Code for Multiple-Access Adder Channel
2374 -- 2381Sen Moriya, Hiroshi Sasano. Construction of High Rate Punctured Convolutional Codes by Exhaustive Search and Partial Search
2382 -- 2390Takayuki Nozaki, Masaki Maehara, Kenta Kasai, Kohichi Sakaniwa. Weight Distribution for Non-binary Cluster LDPC Code Ensemble
2391 -- 2397Akira Hirabayashi, Jumpei Sugimoto, Kazushi Mimura. Complex Approximate Message Passing Algorithm for Two-Dimensional Compressed Sensing
2398 -- 2404Taisaku Ishiwata, Yoshinao Shiraki. A Rectangular Weighting Function Approximating Local Phase Error for Designing Equiripple All-Pass IIR Filters
2405 -- 2414Wei Hou, Tadashi Fujino, Toshiharu Kojima. An Improved Quantization Scheme for Lattice-Reduction Aided MIMO Detection Based on Gram-Schmidt Orthogonalization
2415 -- 2421Tetsuya Kobayashi, Akiko Manada, Takahiro Ota, Hiroyoshi Morita. On the Irreducibility of Certain Shifts of Finite Type
2422 -- 2433Nasima Begum, Toru Nakanishi, Nobuo Funabiki. Efficient Proofs for CNF Formulas on Attributes in Pairing-Based Anonymous Credential System
2434 -- 2442Hidenori Kuwakado, Shoichi Hirose. Multilane Hashing Mode Suitable for Parallel Processing
2443 -- 2446Mitsuharu Arimura, Hiroki Koga, Ken-ichi Iwata. A Characterization of Optimal FF Coding Rate Using a New Optimistically Optimal Code
2447 -- 2451Hiroyuki Ihara, Tomoharu Shibuya. On the Dependence of Error Performance of Spatially Coupled LDPC Codes on Their Design Parameters
2452 -- 2456Takao Maeda, Takafumi Hayashi. Fourier Analysis of Sequences over a Composition Algebra of the Real Number Field
2457 -- 0Kimiyoshi Usami. Foreword
2458 -- 2466Rimon Ikeno, Takashi Maruyama, Satoshi Komatsu, Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada. High-Throughput Electron Beam Direct Writing of VIA Layers by Character Projection with One-Dimensional VIA Characters
2467 -- 2474Katherine Shu-Min Li, Yingchieh Ho, Liang-Bi Chen. Interconnect-Driven Floorplanning with Noise-Aware Buffer Planning
2475 -- 2486Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake. Structured Analog Circuit and Layout Design with Transistor Array
2487 -- 2498Yu Zhang, Gong Chen, Bo Yang, Jing Li, Qing Dong, Ming-Yu Li, Shigetoshi Nakatake. Analog Circuit Synthesis with Constraint Generation of Layout-Dependent Effects by Geometric Programming
2499 -- 2507Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera. Standard Cell Structure with Flexible P/N Well Boundaries for Near-Threshold Voltage Operation
2508 -- 2515Hyunui Lee, Masaya Miyahara, Akira Matsuzawa. A 12-bit Interpolated Pipeline ADC Using Body Voltage Controlled Amplifier
2516 -- 2523Yuuki Araga, Nao Ueda, Yasumasa Takagi, Makoto Nagata. Performance Evaluation of Probing Front-End Circuits for On-Chip Noise Monitoring
2524 -- 2532Zhou Jin, Xiao Wu, Dan Niu, Yasuaki Inoue. Effective Implementation and Embedding Algorithms of CEPTA Method for Finding DC Operating Points
2533 -- 2541Daisuke Fujimoto, Toshihiro Katashita, Akihiko Sasaki, Yohei Hori, Akashi Satoh, Makoto Nagata. A Fast Power Current Simulation of Cryptographic VLSI Circuits for Side Channel Attack Evaluation
2542 -- 2552Shuji Tsukiyama, Masahiro Fukui. A New Delay Distribution Model with a Half Triangular Distribution for Statistical Static Timing Analysis
2553 -- 2560Taeko Matsunaga, Shinji Kimura, Yusuke Matsunaga. An Exact Approach for GPC-Based Compressor Tree Synthesis
2561 -- 2567Jun Yamashita, Hiroyuki Yotsuyanagi, Masaki Hashizume, Kozo Kinoshita. SAT-Based Test Generation for Open Faults Using Fault Excitation Caused by Effect of Adjacent Lines
2568 -- 2575Yu Jin, Zhe Du, Shinji Kimura. Dual-Stage Pseudo Power Gating with Advanced Clustering Algorithm for Gate Level Power Optimization
2576 -- 2586Yasuhiro Takei, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Michitaka Kameyama. Evaluation of an FPGA-Based Heterogeneous Multicore Platform with SIMD/MIMD Custom Accelerators
2587 -- 2596Ming-Chih Chen. A New 8-Bit AES Design for Wireless Network Applications
2597 -- 2611Shin-ya Abe, Youhua Shi, Kimiyoshi Usami, Masao Yanagisawa, Nozomu Togawa. Floorplan Driven Architecture and High-Level Synthesis Algorithm for Dynamic Multiple Supply Voltages
2612 -- 2622Jiayi Zhu, Dajiang Zhou, Satoshi Goto. A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder
2623 -- 2632Xiongxin Zhao, Zhixiang Chen, Xiao Peng, Dajiang Zhou, Satoshi Goto. A 5.83pJ/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65nm CMOS
2633 -- 2644Zhen Zhang, Shouyi Yin, Leibo Liu, Shaojun Wei. An Inductive-Coupling Interconnected Application-Specific 3D NoC Design
2645 -- 2651Jung Hoon Lee, Bo-Sung Jung. High Performance NAND Flash Memory System with a Data Buffer
2652 -- 2659Yichao Lu, Gang He, Guifen Tian, Satoshi Goto. Hybrid Message-Passing Algorithm and Architecture for Decoding Cyclic Non-binary LDPC Codes
2660 -- 2667Kyungsoo Lee, Tohru Ishihara. DC-DC Converter-Aware Task Scheduling and Dynamic Reconfiguration for Energy Harvesting Embedded Systems
2668 -- 2679Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Yuko Hara-Azumi. Clique-Based Architectural Synthesis of Flow-Based Microfluidic Biochips
2680 -- 2688Kazuhito Ito, Ryoto Shirasaka. Hardware Efficient and Low Latency Implementations of Look-Ahead ACS Computation for Viterbi Decoders
2689 -- 2697Keisuke Inoue, Mineo Kaneko. Dual-Edge-Triggered Flip-Flop-Based High-Level Synthesis with Programmable Duty Cycle
2698 -- 2708Hatsuhiro Kato, Hatsuyoshi Kato. New Formulation for the Recursive Transfer Method Using the Weak Form Theory Framework and Its Application to Microwave Scattering
2709 -- 2716Jining Zhao, Chunxiang Xu, Fagen Li, Wenzheng Zhang. Identity-Based Public Verification with Privacy-Preserving for Data Storage Security in Cloud Computing
2717 -- 2727Pradit Mittrapiyanuruk, Pakorn KaewTrakulPong. Retrieval and Localization of Multiple Specific Objects with Hough Voting Based Ranking and A Contrario Decision
2728 -- 2730Shin-Woong Park, Jeonghong Park, Bang Chul Jung. On the Sparse Signal Recovery with Parallel Orthogonal Matching Pursuit
2731 -- 2734Xin Liao, Qiaoyan Wen, Jie Zhang 0004. Improving the Adaptive Steganographic Methods Based on Modulus Function
2735 -- 2739Saransh Malik, Sangmi Moon, Bora Kim, Huaping Liu, Cheolwoo You, Jeong-Ho Kim, Intae Hwang. Novel Relay Protocol Using AMC Based Throughput Optimization in LTE-Advanced System
2740 -- 2744Kyungho Jun, Sekchin Chang. An Interference-Aware Clustering Based on Genetic Algorithm for Cell Broadcasting Service
2745 -- 2749Kensuke Sawada, Shigenobu Sasaki, Shin-ichiro Mori. Magnetic Disturbance Detection Method for Ubiquitous Device