- Peter Jamieson, Donald Blank, Janelle Ghanem, Tyler McGrew, Giancarlo Corti. A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System. Int. J. Reconfig. Comp., 2022, 2022.
- Khaled Allem, El-Bay Bourennane, Youcef Khelfaoui. A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM. Int. J. Reconfig. Comp., 2021, 2021.
- Dimple Sharma, Lev Kirischian. A Decision-Making Method Providing Sustainability to FPGA-Based SoCs by Run-Time Structural Adaptation to Mode of Operation, Power Budget, and Die Temperature Variations. Int. J. Reconfig. Comp., 2021, 2021.
- Dimple Sharma, Lev Kirischian. A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs. Int. J. Reconfig. Comp., 2021, 2021.
- Yuzhi Zhou, Xi Jin, Tianqi Wang. FPGA Implementation of A∗ Algorithm for Real-Time Path Planning. Int. J. Reconfig. Comp., 2020, 2020.
- Jahanzeb Anwer, Sebastian Meisner, Marco Platzner. Dynamic Reliability Management for FPGA-Based Systems. Int. J. Reconfig. Comp., 2020, 2020.
- Wim Vanderbauwhede, Sven-Bodo Scholz, Martin Margala. FPGAs for Domain Experts. Int. J. Reconfig. Comp., 2020, 2020.
- Michael Kirchhoff, Philipp Kerling, Detlef Streitferdt, Wolfgang Fengler 0001. A Real-Time Capable Dynamic Partial Reconfiguration System for an Application-Specific Soft-Core Processor. Int. J. Reconfig. Comp., 2019, 2019.
- Ting Zhang, Bin Liu. Exposing End-to-End Delay in Software-Defined Networking. Int. J. Reconfig. Comp., 2019, 2019.
- Roberto Giorgi, Farnam Khalili, Marco Procaccini. Translating Timing into an Architecture: The Synergy of COTSon and HLS (Domain Expertise - Designing a Computer Architecture via HLS). Int. J. Reconfig. Comp., 2019, 2019.