Wim Vanderbauwhede - researchr alias

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Viewing Publication 1 - 99 from 99

2023

Wiring Circuits Is Easy as {0, 1, ω}, or Is It..Jan de Muijnck-Hughes, Wim Vanderbauwhede. ECOOP 2023: [doi]

Wiring Circuits Is Easy as {0, 1, ω}, or Is It... (Artifact)Jan de Muijnck-Hughes, Wim Vanderbauwhede. darts, 9(2), 2023. [doi]

Quantum Circuit-Width Reduction through Parameterisation and SpecialisationYoussef Moawad, Wim Vanderbauwhede, René Steijl. algorithms, 16(5):241, 2023. [doi]

Dynamically Scheduled Memory Operations in Static High-Level SynthesisRobert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede. fccm 2023: 220 [doi]

A High-Frequency Load-Store Queue with Speculative Allocations for High-Level SynthesisRobert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede. fpt 2023: 115-124 [doi]

Compiler Discovered Dynamic Scheduling of Irregular Code in High-Level SynthesisRobert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede. fpl 2023: 1-9 [doi]

2022

Reducing FPGA Memory Footprint of Stencil Codes through Automatic Extraction of Memory PatternsRobert Szafarczyk, Syed Waqar Nabi, Wim Vanderbauwhede. fpl 2022: 148-152 [doi]

Making legacy Fortran code type safe through automated program transformationWim Vanderbauwhede. tjs, 78(2):2988-3028, 2022. [doi]

2021

PERCEPTRON: an open-source GPU-accelerated proteoform identification pipeline for top-down proteomicsMuhammad Farhan Khalid, Kanzal Iman, Amna Ghafoor, Mujtaba Saboor, Ahsan Ali, Urwa Muaz, Abdul Rehman Basharat, Taha Tahir, Muhammad Abubakar, Momina Amer Akhter, Waqar Nabi, Wim Vanderbauwhede, Fayyaz Ahmad, Bilal Wajid, Safee Ullah Chaudhary. nar, 49(Webserver-Issue):510-515, 2021. [doi]

2020

A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Artifact)Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede. darts, 6(2), 2020. [doi]

FPGAs for Domain ExpertsWim Vanderbauwhede, Sven-Bodo Scholz, Martin Margala. ijrc, 2020, 2020. [doi]

2019

A Typing Discipline for Hardware InterfacesJan de Muijnck-Hughes, Wim Vanderbauwhede. ECOOP 2019: [doi]

A Framework for Resource Dependent EDSLs in a Dependently Typed Language (Pearl)Jan de Muijnck-Hughes, Edwin C. Brady, Wim Vanderbauwhede. ECOOP 2020: [doi]

A Typing Discipline for Hardware Interfaces (Artifact)Jan de Muijnck-Hughes, Wim Vanderbauwhede. darts, 5(2), 2019. [doi]

Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAsSyed Waqar Nabi, Wim Vanderbauwhede. ipps 2019: 87-90 [doi]

Automatic Pipelining and Vectorization of Scientific Code for FPGAsSyed Waqar Nabi, Wim Vanderbauwhede. ijrc, 2019, 2019. [doi]

FPGA design space exploration for scientific HPC applications using a fast and accurate cost model based on roofline analysisSyed Waqar Nabi, Wim Vanderbauwhede. jpdc, 133:407-419, 2019. [doi]

Efficient FPGA Cost-Performance Space Exploration using Type-Driven Program TransformationsCristian Urlea, Wim Vanderbauwhede, Syed Waqar Nabi. reconfig 2019: 1-2 [doi]

Type-Driven Automated Program Transformations and Cost Modelling for Optimising Streaming Programs on FPGAsWim Vanderbauwhede, Syed Waqar Nabi, Cristian Urlea. ijpp, 47(1):114-136, 2019. [doi]

2018

MP-STREAM: A Memory Performance Benchmark for Design Space Exploration on Heterogeneous HPC DevicesSyed Waqar Nabi, Wim Vanderbauwhede. ipps 2018: 194-197 [doi]

The Glasgow Fortran Source-to-Source CompilerWim Vanderbauwhede. jossw, 3(32):865, 2018. [doi]

2016

Improving Resilience by Deploying Permuted Code onto Physically Unclonable Unique ProcessorsAndreas Assmuth, Paul Cockshott, Jana Kipke, Karen Renaud, Lewis Mackenzie, Wim Vanderbauwhede, Matthias Söllner, Tilo Fischer, George R. S. Weir. ccc2 2016: 144-150 [doi]

Evaluation of the Memory Communication Traffic in a Hierarchical Cache Model for Massively-Manycore ProcessorsSharifa Al Khanjari, Wim Vanderbauwhede. pdp 2016: 726-733 [doi]

A Fast and Accurate Cost Model for FPGA Design Space Exploration in HPC ApplicationsSyed Waqar Nabi, Wim Vanderbauwhede. ipps 2016: 114-123 [doi]

Document classification systems in heterogeneous computing environmentsNasibeh Nasiri, Philip Colangelo, Oren Segal, Martin Margala, Wim Vanderbauwhede. patmos 2016: 291-295 [doi]

An analysis of the feasibility and benefits of GPU/multicore acceleration of the Weather Research and Forecasting modelWim Vanderbauwhede, Tetsuya Takemi. concurrency, 28(7):2052-2072, 2016. [doi]

2015

FPGA Port of a Large Scientific Model from Legacy Code: The Emanuel Convection SchemeKristian Thorin Hentschel, Wim Vanderbauwhede, Syed Waqar Nabi. parco 2016: 469-478 [doi]

Shortest Path Routing Algorithm for Hierarchical Interconnection Network-on-ChipOmair Inam, Sharifa Al Khanjari, Wim Vanderbauwhede. fnc 2015: 409-414 [doi]

The Impact of Traffic Localisation on the Performance of NoCs for Very Large Manycore SystemsSharifa Al Khanjari, Wim Vanderbauwhede. fnc 2015: 403-408 [doi]

Using type transformations to generate program variants for FPGA design space explorationSyed Waqar Nabi, Wim Vanderbauwhede. reconfig 2015: 1-6 [doi]

High Level Programming of Document Classification Systems for Heterogeneous Environments using OpenCL (Abstract Only)Nasibeh Nasiri, Oren Segal, Martin Margala, Wim Vanderbauwhede, Sai Rahul Chalamalasetti. fpga 2015: 274 [doi]

Efficient Parallel Linked List ProcessingAshkan Tousimojarad, Wim Vanderbauwhede. parco 2016: 295-304 [doi]

Number of Tasks, not Threads, is KeyAshkan Tousimojarad, Wim Vanderbauwhede. pdp 2015: 128-136 [doi]

Steal Locally, Share Globally - A Strategy for Multiprogramming in the Manycore EraAshkan Tousimojarad, Wim Vanderbauwhede. ijpp, 43(5):894-917, 2015. [doi]

Twinned buffering: A simple and highly effective scheme for parallelization of Successive Over-Relaxation on GPUs and other acceleratorsWim Vanderbauwhede, Tetsuya Takemi. ieeehpcs 2015: 436-443 [doi]

Putting Heterogeneous High-Performance Computing at the Fingertips of Domain Experts (NII Shonan Meeting 2015-18)Wim Vanderbauwhede, Sven-Bodo Scholz, Tetsuya Takemi. shonan-reports, 2015, 2015. [doi]

FPGAs as Components in Heterogeneous High-Performance Computing Systems: Raising the Abstraction LevelWim Vanderbauwhede, Syed Waqar Nabi. parco 2016: 505-514 [doi]

2014

2013

Throughput/Resource-Efficient Reconfigurable Processor for Multimedia ApplicationsSohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede. tvlsi, 21(7):1346-1350, 2013. [doi]

Design and Evaluation of High-Performance Processing Elements for Reconfigurable SystemsSohan Purohit, Sai Rahul Chalamalasetti, Martin Margala, Wim Vanderbauwhede. tvlsi, 21(10):1915-1927, 2013. [doi]

An Efficient Thread Mapping Strategy for Multiprogramming on Manycore ProcessorsAshkan Tousimojarad, Wim Vanderbauwhede. parco 2014: 63-71 [doi]

Implementing data parallelisation in a Nested-Sampling Monte Carlo algorithmWim Vanderbauwhede, Stefanie Lewis, David Ireland. ieeehpcs 2013: 512-518 [doi]

Implementing data parallelisation in a Nested-Sampling Monte Carlo algorithmWim Vanderbauwhede, Stefanie Lewis, David Ireland. hpcs 2013: 512-518 [doi]

An investigation into the feasibility and benefits of GPU/multicore acceleration of the weather research and forecasting modelWim Vanderbauwhede, Tetsuya Takemi. hpcs 2013: 482-489 [doi]

An investigation into the feasibility and benefits of GPU/multicore acceleration of the weather research and forecasting modelWim Vanderbauwhede, Tetsuya Takemi. ieeehpcs 2013: 482-489 [doi]

A hybrid CPU-FPGA system for high throughput (10Gb/s) streaming document classificationWim Vanderbauwhede, Anton Frolov, Sai Rahul Chalamalasetti, Martin Margala. sigarch, 41(5):53-58, 2013. [doi]

High throughput filtering using FPGA-accelerationWim Vanderbauwhede, Anton Frolov, Leif Azzopardi, Sai Rahul Chalamalasetti, Martin Margala. CIKM 2013: 1245-1248 [doi]

2012

2011

An analytical model of broadcast in QoS-aware wormhole-routed NoCsMahmoud Moadeli, Wim Vanderbauwhede. jss, 84(1):12-20, 2011. [doi]

A few lines of code, thousands of cores: High-level FPGA programming using vector processor networksWim Vanderbauwhede, Sai Rahul Chalamalasetti, Sohan Purohit, Martin Margala. ieeehpcs 2011: 461-467 [doi]

2010

Search system requirements of patent analystsLeif Azzopardi, Wim Vanderbauwhede, Hideo Joho. sigir 2010: 775-776 [doi]

Radiation-Hardened Reconfigurable Array With Instruction Roll-BackSai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede. esl, 2(4):123-126, 2010. [doi]

Performance Analysis of On-Chip Communication Structures under Device VariabilityFaiz-ul Hassan, Wim Vanderbauwhede, Fernando Rodríguez Salazar. ijertcs, 1(4):40-62, 2010. [doi]

A survey of patent users: an analysis of tasks, behavior, search functionality and system requirementsHideo Joho, Leif Azzopardi, Wim Vanderbauwhede. iiix 2010: 13-24 [doi]

Communication modeling of multicast in all-port wormhole-routed NoCsMahmoud Moadeli, Wim Vanderbauwhede. jss, 83(8):1327-1336, 2010. [doi]

An analytical performance model for the Spidergon NoC with virtual channelsMahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Partha P. Maji. jsa, 56(1):16-26, 2010. [doi]

A high-level language for programming a NoC-based Dynamic Reconfiguration InfrastructureWim Vanderbauwhede, Syed Waqar Nabi. dasip 2010: 7-14 [doi]

A C++-embedded Domain-Specific Language for programming the MORA soft processor arrayWim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit. asap 2010: 141-148 [doi]

2009

Dynamic counter-based broadcast in MANETsSarah Omar Al-Humoud, Lewis M. Mackenzie, Wim Vanderbauwhede. mswim 2009: 84-88 [doi]

Developing energy efficient filtering systemsLeif Azzopardi, Wim Vanderbauwhede, Mahmoud Moadeli. sigir 2009: 664-665 [doi]

MORA - An Architecture and Programming Model for a Resource Efficient Coarse Grained Reconfigurable ProcessorSai Rahul Chalamalasetti, Sohan Purohit, Martin Margala, Wim Vanderbauwhede. ahs 2009: 389-396 [doi]

A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming modelSai Rahul Chalamalasetti, Wim Vanderbauwhede, Sohan Purohit, Martin Margala. fpl 2009: 534-538 [doi]

Impact of device variability in the communication structures for future synchronous SoC designsFaiz-ul Hassan, B. Cheng, Wim Vanderbauwhede, Fernando Rodríguez Salazar. issoc 2009: 68-72 [doi]

Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-Based Packet Processing SystemsPaul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede. fccm 2009: 175-182 [doi]

Automated instrumentation of FPGA-based systems for system-level transaction monitoringPaul Edward McKechnie, Michaela Blott, Wim Vanderbauwhede. issoc 2009: 168-171 [doi]

Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoringPaul E. McKechnie, Michaela Blott, Wim Vanderbauwhede. lctrts 2009: 129-136 [doi]

A performance model of multicast communication in wormhole-routed networks on-chipMahmoud Moadeli, Wim Vanderbauwhede. ipps 2009: 1-8 [doi]

Design and implementation of the Quarc Network on-ChipMahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede. ipps 2009: 1-9 [doi]

Quarc: A High-Efficiency Network on-Chip ArchitectureMahmoud Moadeli, Partha P. Maji, Wim Vanderbauwhede. aina 2009: 98-105 [doi]

A Communication Model of Broadcast in Wormhole-Routed Networks on-ChipMahmoud Moadeli, Wim Vanderbauwhede. aina 2009: 315-322 [doi]

An Analytical Comparison of the Spidergon and Rectangular Mesh NoCsMahmoud Moadeli, Ali Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua. join, 10(1-2):167-188, 2009. [doi]

MAW: A Reliable Lightweight Multi-hop Wireless Sensor Network Routing ProtocolKunjan Patel, Lim Jong Chern, Chris J. Bleakley, Wim Vanderbauwhede. cse 2009: 487-493 [doi]

FPGA-accelerated Information Retrieval: High-efficiency document filteringWim Vanderbauwhede, Leif Azzopardi, Mahmoud Moadeli. fpl 2009: 417-422 [doi]

Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia ProcessorWim Vanderbauwhede, Martin Margala, Sai Rahul Chalamalasetti, Sohan Purohit. ersa 2009: 195-201

2008

A Hardware Relaxation Paradigm for Solving NP-Hard ProblemsPaul Cockshott, Andreas Koltes, John O Donnell, Patrick Prosser, Wim Vanderbauwhede. bcs 2008: 75-86 [doi]

A type system for static typing of a domain-specific languagePaul E. McKechnie, Nathan A. Lindop, Wim Vanderbauwhede. fpga 2008: 258 [doi]

Quarc: A Novel Network-On-Chip ArchitectureMahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi. icpads 2008: 705-712 [doi]

A Performance Model of Communication in the Quarc NoCMahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi. icpads 2008: 908-913 [doi]

Communication Modeling of QoS-Aware Wormhole-Routed NoCsMahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi. join, 9(4):409-423, 2008. [doi]

Modeling Differentiated Services-Based QoS in Wormhole-Routed NoCsMahmoud Moadeli, Alireza Shahrabi, Wim Vanderbauwhede, Mohamed Ould-Khaoua. aina 2008: 942-949 [doi]

A coarse-grained Dynamically Reconfigurable MAC Processor for power-sensitive multi-standard devicesSyed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede. socc 2008: 151-154 [doi]

Interface and Reconfiguration Controller for a wireless MAC-oriented dynamically reconfigurable hardware co-processorSyed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede. fpl 2008: 591-594 [doi]

A Dynamically Reconfigurable Hardware Co-Processor for a Multi-Standard Wireless MAC ProcessorSyed Waqar Nabi, Cade C. Wells, Wim Vanderbauwhede. ahs 2008: 368-375 [doi]

A Formal Semantics for Control and Data flow in the Gannet Service-based System-on-Chip ArchitectureWim Vanderbauwhede. ersa 2008: 176-183

The Gannet Service Manager: A Distributed Dataflow Controller for Heterogeneous Multi-core SoCsWim Vanderbauwhede, Paul Edward McKechnie, Chidambaram Thirunavukkarasu. ahs 2008: 301-308 [doi]

2007

2006

The Gannet Service-Based SoC: A Service-level Reconfigurable ArchitectureWim Vanderbauwhede. ahs 2006: 255-261 [doi]

2001

A compact test structure for characterisation of leakage currents in sub-micron CMOS technologiesZhenqiu Ning, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon, Marnix Tack, Paul Raes. mr, 41(12):1939-1945, 2001. [doi]

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