Table of Contents

• An FPGA softcore based implementation of a bird call recognition system for sensor networksHongzhi Liu, Neil W. Bergmann. 1-6 [doi]
• A high-level language for programming a NoC-based Dynamic Reconfiguration InfrastructureWim Vanderbauwhede, Syed Waqar Nabi. 7-14 [doi]
• An in-band reconfigurable network node based on a heterogeneous platformErik Markert, Enrico Billich, Claudia Tischendorf, Uwe Proß, Thilo Leibelt, Ulrich Heinkel, Joachim Knäblein, Axel Schneider. 15-20 [doi]
• High speed Fp multipliers and adders on FPGA platformSantosh Ghosh, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury. 21-26 [doi]
• A new single-error correction scheme based on self-diagnosis residue number arithmeticYangyang Tang, Emmanuel Boutillon, Christophe Jégo, Michel Jézéquel. 27-33 [doi]
• Runtime adaptive allocation of dynamically mixed tasks on a heterogeneous MPSoC platformJia Huang, Andreas Raabe, Christian Buckl, Alois Knoll. 34-41 [doi]
• Energy modeling of the virtual memory subsystem for real-time embedded systemsMickael Lanoe, Eric Senn. 42-47 [doi]
• A flexible implementation of a Global Navigation Satellite System (GNSS) receiver for on-board satellite navigationArnaud Dion, Emmanuel Boutillon, Vincent Calmettes, Emmanuel Liegon. 48-53 [doi]
• Wireless Sensor Network node global energy consumption modelingAntoine Courtay, Alain Pegatoquet, Michel Auguin, Chiraz Chabaane. 54-61 [doi]
• Camera-based system for tracking and position estimation of humansRobert Hartmann, Fadi Al Machot, Philipp Mahr, Christophe Bobda. 62-67 [doi]
• Designing dynamically reconfigurable SoCs: From UML MARTE models to automatic code generationImran Rafiq Quadri, Samy Meftali, Jean-Luc Dekeyser. 68-75 [doi]
• A dynamically reconfigurable asynchronous processor for low power applicationsKhodor Ahmad Fawaz, Tughrul Arslan, Sami Khawam, Mark Muir, Ioannis Nousias, Iain Lindsay, Ahmet T. Erdogan. 76-83 [doi]
• A hybrid dual-core Reconfigurable Processor for EBCOT tier-1 encoder in JPEG2000 on next generation of digital camerasXin Zhao, Ahmet T. Erdogan, Tughrul Arslan. 84-89 [doi]
• A wavelet-based demosaicking algorithm for embedded applicationsSébastien Courroux, Stéphane Guyetant, Stéphane Chevobbe, Michel Paindavoine. 90-96 [doi]
• An in-memory monitoring database for self adaptive MP:::2:::SoCsEtienne Faure, Gabriel Marchesan Almeida, Mounir Benabdenbi, Pascal Benoit, Fabien Clermidy, François Pêcheux, Gilles Sassatelli, Lionel Torres. 97-104 [doi]
• Generation of static tables in embedded memory with dense schedulingBenoit Miramond, Liliana Cucu-Grosjean. 105-112 [doi]
• Hardware code generation from dataflow programsNicolas Siret, Matthieu Wipliez, Jean-François Nezan, Aimad Rhatay. 113-120 [doi]
• GPU architecture evaluation for multispectral and hyperspectral image analysisVirginie Fresse, Dominique Houzet, Christophe Gravier. 121-127 [doi]
• A case study of the stochastic modeling approach for range estimationAndrei Banciu, Emmanuel Casseau, Daniel Menard, Thierry Michel. 128-135 [doi]
• An inter-task real time DVFS scheme for multiprocessor embedded systemsMuhammad Khurram Bhatti, Cécile Belleudy, Michel Auguin. 136-143 [doi]
• RVC: A multi-decoder CAL Composer toolFrancesca Palumbo, Danilo Pani, Emanuele Manca, Luigi Raffo, Marco Mattavelli, Ghislain Roquier. 144-151 [doi]
• A coarse-grain reconfigurable hardware architecture for RVC-CAL-based designCecile Beaumin, Olivier Sentieys, Emmanuel Casseau, Arnaud Carer. 152-159 [doi]
• Design and hardware implementation of a low-complexity multiuser vector precoderMaitane Barrenechea, Luis G. Barbero, Mikel Mendicute, John Thompson. 160-167 [doi]
• Scheduling, binding and routing system for a run-time reconfigurable operator based multimedia architectureErwan Raffin, Christophe Wolinski, François Charot, Krzysztof Kuchcinski, Stéphane Guyetant, Stéphane Chevobbe, Emmanuel Casseau. 168-175 [doi]
• On-chip compression for HDR image sensorsFadoua Guezzi Messaoud, Arnaud Peizerat, Antoine Dupret, Yves Blanchard. 176-182 [doi]
• A portable Video Tool Library for MPEG Reconfigurable Video Coding using LLVM representationJérôme Gorin, Matthieu Wipliez, Françoise J. Prêteux, Mickaël Raulet. 183-190 [doi]
• High level design space exploration of RVC codec specifications for multi-core heterogeneous platformsChristophe Lucarz, Ghislain Roquier, Marco Mattavelli. 191-198 [doi]
• FPGA-based rectification of stereo imagesJoao G. P. Rodrigues, João Canas Ferreira. 199-206 [doi]
• RVC-CAL dataflow implementations of MPEG AVC/H.264 CABAC decodingEndri Bezati, Marco Mattavelli, Mickaël Raulet. 207-213 [doi]
• Physical layer study in a goal of robustness and energy efficiency for wireless sensor networksDenis Dessales, Anne-Marie Poussard, Rodolphe Vauzelle, N. Richard, François Gaudaire, Christophe Martinsons. 214-221 [doi]
• GPU implementation of motion estimation for visual saliencyAnis Rahman, Dominique Houzet, Denis Pellerin, Lionel Agud. 222-227 [doi]
• Task placement for dynamic and partial reconfigurable architectureAntoine Eiche, Daniel Chillet, Sébastien Pillement, Olivier Sentieys. 228-234 [doi]
• Characterization of capture actions in video sequencesAna Pinzari, Mohamed Shawky. 235-241 [doi]
• Hardware/software co-design of H.264/AVC encoders for multi-core embedded systemsTiago Dias, Nuno Roma, Leonel Sousa. 242-249 [doi]
• Real-time classification based on color and texture attributes on an FPGA-based architectureMario Alberto Ibarra-Manzano, Michel Devy, Jean-Louis Boizard. 250-257 [doi]
• Low power noise detection circuit utilizing switching activity measurement methodZulhakimi Razak, Ahmet T. Erdogan, Tughrul Arslan. 258-264 [doi]
• Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementationRuirui Gu, Jonathan Piat, Mickaël Raulet, Jörn W. Janneck, Shuvra S. Bhattacharyya. 265-272 [doi]
• A methodology for precise comparisons of processor core architectures for homogeneous many-core DSP platformsBertrand Rousseau, Philippe Manet, Igor Loiselle, Jean-Didier Legat, Hans Vandierendonck. 273-280 [doi]
• Exploration platform of embedded simd architecture for autonomous retinasStéphane Chevobbe, Suresh Pajaniradja, Laurent Letellier. 281-288 [doi]
• Dual-core reconfigurable demosaicing engine for next generation of portable camera systemsXin Zhao, Ying Yi, Ahmet T. Erdogan, Tughrul Arslan. 289-294 [doi]
• Architectures and signal reconstruction methods for nanosecond resolution Integrated Streak Camera in standard CMOS technologyMartin Zlatanski, Wilfried Uhring, Virginie Zint, Jean-Pierre Le Normand, Daniel Mathiot. 295-302 [doi]
• Classification and transformation of dynamic dataflow programsMatthieu Wipliez, Mickaël Raulet. 303-310 [doi]
• A Roadmap for Autonomous Fault-Tolerant SystemsXabier Iturbe, Khaled Benkrid, Tughrul Arslan, Imanol Martinez, Mikel Azkarate-askasua, Marco D. Santambrogio. 311-321 [doi]