7 | -- | 14 | Georg Färber. Future architecture of high performance workstations |
17 | -- | 19 | Luc Steels. Massive parallelism for artificial intelligence (extended abstract) |
23 | -- | 30 | Jan Janecek, Vlastimil Jánes. Register array processor |
31 | -- | 38 | John H. Lane, Roger A. Niederland, Terrence L. Rasset, William A. Geideman. GaAs implementation of a 32-bit RISC |
39 | -- | 46 | Zdenek Blazek, Petr Kroha. Design of a reconfigurable parallel RISC-machine |
49 | -- | 55 | R. G. Bramley, D. J. Creasey. A real-time image compressor using a modular signal-processing system employing occam and the transputer |
57 | -- | 63 | Nick Kanopoulos, Nagesh Vasanthavada. A monolithic scan-line bit producer for real-time image rasterization |
65 | -- | 71 | Reiner W. Hartenstein, Alexander Hirschbiel, M. Weber. A flexible architecture for image processing |
75 | -- | 81 | Roman Trobec, Janez Korenini, Ludvik Gyergyek. A regular WSI-node architecture |
83 | -- | 90 | Leonardo Jervis, Donatella Sciuto. A reconfiguration algorithm for wafer-scale integration of systolic arrays |
91 | -- | 97 | F. C. Bonzio, M. G. Sami, Giancarlo Storti Gajani. Fault-tolerant solutions for complex-numbers multipliers |
101 | -- | 109 | B. G. Taylor. Macintosh in the laboratory |
111 | -- | 117 | Wolfhard Lawrenz. Controller network development - but how?! |
119 | -- | 126 | Cedomir Milenkovic, Dusan Starcevic, Biljana Mucibabic. PC-based multimedia messaging systems |
129 | -- | 135 | J. Vermeesch, P. Bulckaert, Michel Defrise, Oscar Steenhaut. A pipelined VLSI-based structure for the reconstruction of three-dimensional images from projections |
137 | -- | 140 | Sergios Theodoridis, Nicholas Kalouptsidis. Parallel algorithm for MSE estimation of 2-D noncasual image models |
141 | -- | 150 | Roy H. Vivian, B. Sc. C. Eng. DPCM studies using edge prediction and adaptive quantisation laws for the transmission of still pictures over the ISDN |
153 | -- | 160 | Wolfgang A. Halang. A PC-based evaluation and control system for gas-liquid chromatography |
161 | -- | 169 | P. Atkins, B. V. Smith. The optimal extraction of velocity information from a sonar correlation log |
171 | -- | 177 | Michel Auguin, Fernand Boéri, J. P. Dalban, A. Vincent-Carrefour. Experience using a SIMD/SPMD multiprocessor architecture |
181 | -- | 188 | Thomas Bemmerl, Gerhard Schöder. A portable realtime multitasking kernel for embedded microprocessor systems |
189 | -- | 195 | Lilyan Nikolov, Ivan Kovashki. Design and implementation of a portable kernel for real-time applications |
197 | -- | 204 | Takehiko Shimojima, Masanori Teramoto. V60 real-time operating system |
205 | -- | 210 | Joberto S. B. Martins, Gérard L. M. Noguez. A Unix distributed application support suitable for mini and microcomputer based systems |
213 | -- | 221 | Janusz Górski, Henryk J. Napiatek. Formal specification of basic mechanisms of a message passing kernel |
223 | -- | 230 | Jonathan P. Bowen. Formal specification and documentation of microprocessor instruction sets |
231 | -- | 240 | Luc Duponcheel, Jurgen Heyman, Willy Van Puymbroeck, Johan Lewi, Ivo van Horebeek. The algebraic data type specification language |
241 | -- | 248 | B. Londeix, K. H. Fan. Specification using lotos on the test facility of a transmission system |
249 | -- | 250 | Klaus Waldschmidt. Session C3: AI architecture and applications I |
251 | -- | 258 | Abimbola O. Oshisanwo, Paul P. Dasiewicz. MAPPS: A VLSI multiprocessor for the execution of production system programs |
259 | -- | 266 | Ioannis P. Vlahavas, Constantin Halatsis. A RISC prolog machine architecture |
267 | -- | 273 | Pierluigi Civera, Gianluca Piccinini, Maurizio Zamboni. Design considerations on a VLSI Prolog interpreter |
275 | -- | 282 | K. Wada, M. Miyamoto, S. Kuo, Y. Kaneda, S. Maekawa. Intermediate code for the sequential Prolog machine PEK |
283 | -- | 0 | John Mølgaard. Short notes |
285 | -- | 286 | Thomas Røgeberg. Software engineering & environments I |
287 | -- | 293 | Massimo Ancona, Andrea Clematis, G. Dodero, V. Filippone, Vittoria Gianuzzi. Structuring a distributed program: the XMDS approach |
295 | -- | 299 | Martin D. Beer, J. David T. Martin. The provision of flexibility in hiercrchical control systems |
301 | -- | 309 | Ronald Huijsman, Jan van Katwijk, W. J. Toetenel. Performance aspects of Ada tasking in embedded systems |
313 | -- | 318 | Edward E. E. Frietman, F. Bruggeman. The inner product processor |
319 | -- | 324 | R. E. Buehrer. Emulation of a parallel codeblock dataflow processor |
325 | -- | 330 | Drazen Flego, Herbert Schweinzer. Vampix, a multimicroprocessor control system adaptable to special complex machines |
333 | -- | 338 | Richard Vogt. Improving the reliability of bus systems: Fault isolation and fault tolerance |
339 | -- | 346 | Vincenzo Piuri, Evgenij Tourouta. An approach to fault-tolerant allocation of concurrent communicating processes in multiprocessor architectures and hardware dimensioning |
347 | -- | 355 | J. G. M. Kroon, Gilbert E. Houtekamer, Gerard L. Reijns, C. J. van Spronsen, B. V. Ormas. Performance evaluation package for UNIX III systems |
357 | -- | 0 | John Mølgaard. Short notes |
361 | -- | 370 | Hans-Ludwig Hausen. An effectively instrumentable life cycle model: A layer and view approach to software systemeering |
371 | -- | 381 | Giovanni Cantone, Aniello Cimitile, Ugo de Carlini. Testability and path testing strategies |
383 | -- | 389 | Dimitris Christodoulakis, P. Soupos, Christos D. Zaroliagis. The implementation of a software engineering database using desk-size computing resources |
393 | -- | 403 | Antti Valmari. Reachability analysis -based validation of embedded systems |
405 | -- | 412 | Gerard L. Reijns, U. E. Kraus, S. Jinsi, W. C. Hildering. Compact-disk image display and handling system |
413 | -- | 416 | John Billingsley, Arthur A. Collie, T. C. Dadd. Cooker programmers with embedded microcomputers |
419 | -- | 426 | Herbert Schweinzer. Functional programming of a robot motion control |
427 | -- | 431 | U. Niemelä, T. Heikkilä, P. Kärkkäinen. Integrated sensors to an assembly robot using a distributed control network |
433 | -- | 439 | Derek R. Wilson, Stephen C. Winter. On the analysis and design of manufacturing systems |
441 | -- | 0 | John Mølgaard. Short notes |
445 | -- | 452 | Michael Payer. Verification and validation of hierarchical CMOS gate array layouts |
453 | -- | 461 | Hans Eveking. Formal reasoning about switch-level MOS descriptions |
463 | -- | 470 | Christian Piguet, Evert Dijkstra, A. Theys, M. Stauffer, J.-F. Perotto. A design methodology of microprogrammed controllers for custom CMOS IC's |
471 | -- | 478 | Rainer Buschke, Klaus Lagemann. Computer aided evalution of simulation results, the Simueva program package |
481 | -- | 487 | Giovanni Cantone, Bruno Ciciani. Inserting state restoration requests in systems of distributed processes |
489 | -- | 496 | Franc Novak, Ludvik Gyergyek. Distributed system diagnosability based in self-testing system nodes |
497 | -- | 504 | Wojciech E. Kozlowski, Henryk Krawczyk, Tadeusz Bartkowski. System diagnosability in some restricted hybrid fault situations. Comparative studies on different system-level fault diagnosis models |
507 | -- | 514 | Paul Delbar. A parallel approach to rule based systems |
515 | -- | 522 | D. Stamatis, Constantin Halatsis. Encapsulation constructs in prolog |
523 | -- | 530 | Karl Mchael Marks, Karl F. Goser. An expert system shell for standardization of VLSI process data base and knowledge base |
531 | -- | 538 | Roberto Cremonini, Evelina Lamma, Paola Mello. Optimization techniques in building expert systems |
541 | -- | 548 | G. Leon, J. Cea, A. De La Fuente, F. Rodriguez. Semi-automatic guided synthesis of concurrent systems specifications |
549 | -- | 557 | Robert Glück, Christian Demuth. OC-FP, An applicative language combination with occam and the algebra of processes |
559 | -- | 565 | Danny Crookes, Philip J. Morrow, Peter Milligan, N. Stanley Scott, P. L. Kilpatrick. Notes on implementing a language for transputer networks |
569 | -- | 576 | A. Bonomo, G. Bussolino, G. Girardi, M. Italiano. From structural RT description tio floor plan |
577 | -- | 584 | Peter Pfahler. Automated datapath synthesis: a compilation approach |
585 | -- | 590 | Reiner W. Hartenstein, Udo Welters. MLED: A multiple abstraction level graphical editor |
593 | -- | 602 | Eddy H. Debaere. A language coprocessor for the interpretation of threaded coded |
603 | -- | 611 | Fazel Naghdy, Golshah Naghdy, D. Smith, John Billingsley. Parallel control of a waste-water treatment plant using a real-time multi-tasking operating system |
613 | -- | 619 | J. Scholten, J. Hofstede, G. J. M. Smit. Proposal for an architecture for TUMULT based on a serial data link |
623 | -- | 628 | D. Q. M. Fay, Pradip K. Das. Hardware reconfiguration of Transputer networks for distributed object-oriented programming |
629 | -- | 636 | Kari Leppälä. Utilization of parallelism in transputer-based real-time control systems |
639 | -- | 645 | Erik Rijks, Jan Vermeesch, Marnix Goossens, Jacques Tiberghien. Integration of a hardware module for tracing local variables in real-time software |
647 | -- | 654 | Yau-Hwang Kuo, Jang-Pong Hsu, Ling-Yeung Kung. A graph-based algorithm for the automated datapath synthesis of ASM |
657 | -- | 663 | Milan S. Vlajnié, Teodor Maksimovié. Coprocessor design for GaAs technology |
665 | -- | 670 | Antonio Núñez. A survey of GaAs computer designs |