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| 7 | -- | 10 | Maciej Piechowka, Stanislaw Szejko. An object-oriented kernel for distributed simulation of concurrent systems |
| 11 | -- | 13 | Miroslav Svéda. Microcontroller software engineering |
| 15 | -- | 18 | Paola Nieddu. A unifying approach to clientship, delegation and inheritance in object oriented languages |
| 19 | -- | 22 | Mary Buchanan, Carol Britton. Formal specification and object-oriented design |
| 23 | -- | 26 | Massimo Annunziata, Sergio Calabrese, Raffaele Lorello. SIPA: An activity-planning system |
| 27 | -- | 30 | M. Pfeiffer, Rudolf Haggenmüller. System engineering with DOMINO and GRAPES |
| 33 | -- | 36 | Jan Janecek. Pollux: A language for distributed system programming |
| 37 | -- | 40 | Lecordier Richard, Martin Patrick. Data flow processors for automated visual inspection |
| 41 | -- | 44 | Yoo S. Kim, Song C. Moon. Update synchronization pursuing site autonomy in heterogeneous distributed databases |
| 45 | -- | 48 | Johan Ringström, Peter Fritzson, Johan Fagerström. PREDULA a multi-paradigm parallel programming and debugging environment |
| 49 | -- | 52 | Borut Jereb, Ljubo Pipan. Measuring parallelism in algorithms |
| 53 | -- | 56 | Anton M. van Wezenbeek, Willem Jan Withagen. Adaptive window working set replacement policies |
| 59 | -- | 62 | Gerard J. M. Smit, Paul J. M. Havinga, Pierre G. Jansen. On the design of a dynamic reconfigurable network switch |
| 63 | -- | 66 | Yong I. Yoon, Song C. Moon. Reliable transaction processing for real-time distributed database systems |
| 67 | -- | 71 | Andrea Clematis, Vittoria Gianuzzi. The conversation deadlock problem in client-server model |
| 73 | -- | 74 | Peter Milligan, R. K. McConnell, S. A. Rea, Paul Sage. Fortport: An environment for the development of parallel fortran programs |
| 77 | -- | 80 | Peter Milligan, S. A. Rea, R. K. McConnell, H. R. J. Walters. Parallel collocation modelling: A case study in developing efficient parallel codes |
| 81 | -- | 84 | Harald-Reto Fonio, Adam Pawlak. Rule-based synthesis using ADTs and term rewriting |
| 85 | -- | 88 | J. Morán, S. Alexandres. A comparison of some processor farm architectures |
| 89 | -- | 92 | Jordi Carrabina, J. C. Calderon, F. Lisa, C. Perez, F. Garrido, Narcís Avellana, Elena Valderrama. Digital neural network system based in new concepts on the recall phase dynamics |
| 93 | -- | 96 | Daniel Mozos, Julio Septién, Francisco Tirado, Román Hermida. Design control in a high level synthesis system |
| 97 | -- | 102 | Vincenzo Piuri, Renato Stefanelli. Fault-tolerant techniques for VLSI tree structures |
| 103 | -- | 106 | P. Pramanik, Pradip K. Das, A. K. Bandyopadhyay, D. Q. M. Fay. Avoidance of deadlock in loop structures - a two process solution |
| 109 | -- | 112 | Petr Kroha, Peter Fritzson. Software features of an extended single instruction machine |
| 113 | -- | 116 | Xiaoming Fan. Queue-based primitives for a multithreaded architecture |
| 117 | -- | 120 | J. D. M. McKeever, D. R. W. Holton, R. M. McKeag. Using transputers in a robot programming and control system |
| 121 | -- | 124 | Nikola B. Serbedzija. Parallel programming on a PC - a case study |
| 125 | -- | 128 | Juan Manuel Adán Coello, Maurício Ferreira Magalhães. Ster's multilevel programming model for distributed hard real-time systems |
| 129 | -- | 132 | Alessandro Gandelli, Vincenzo Piuri. A highly-parallel system for real-time electronic measurements |
| 135 | -- | 138 | Gy. Ambrózy, István Cseke, Z. Fazekas, S. Zöld. ARGUS - a PC based image processing workstation its software and some application examples |
| 139 | -- | 142 | S. L. Horianopoulos, D. E. Metafas, Costas E. Goutis, Theodore L. Deliyannis. A VLSI synthesis tool for complementary output delta modulation FIR filters |
| 143 | -- | 145 | E. Randon, P. Sanchez, E. Villar. ESP, a structure synthesis program |
| 147 | -- | 152 | Marco Dorigo. Using transputers to increase speed and flexibility of genetics-based machine learning systems |
| 153 | -- | 155 | D. Sampsonidis, M. Zamani. An image analysis system for automatic measurements in solid state nuclear track detectors |
| 157 | -- | 160 | Gabriel P. Silva, Júlio S. Aude. Evaluation of a sparc architecture with harvard bus and branch target cache |
| 163 | -- | 166 | Zdenek Blazek, Ivan Jelínek. Multiprocessor monitoring system |
| 167 | -- | 170 | Kiyeol Ryu, Seungryoul Maeng. Specifying and inheriting concurrent objects |
| 171 | -- | 174 | Peter Brezany, Viera Sipková. Compiling a vector and array processing language for an associative processor |
| 175 | -- | 178 | Handong Wu, Lars-Erik Thorelli, Abdel-Halim Smai. Flow control support for efficient realization of the EDA model |
| 179 | -- | 182 | Friedrich Mayer-Lindenberg. Interactive software development for complex embedded systems |
| 183 | -- | 186 | Jerzy J. Dabrowski. Efficient timing verification via mixed-mode technique |
| 187 | -- | 191 | Syhy-Chang Su, Prasenjit Biswas. A memory-mapped interprocessor communication architecture using FIFO RAMs |
| 193 | -- | 196 | Luis Gómez, Antonio Hernández, Antonio Núñez. Timimg model for SDCFL digital circuits |
| 197 | -- | 200 | Milan Ojstersek, Viljem Zumer. Improving a time critical task execution time using an IPRESPS |
| 201 | -- | 204 | Marek Tudruj. Multi-layer reconfigurable transputer systems with distributed control of link connections |
| 207 | -- | 210 | Gy. Bango, M. Gardos, J. Miskolczi, I. Szabo, I. Renyi. Design concepts and realization of the hardware structure of ARGUS image processing workstation |
| 211 | -- | 214 | Nick Bailey, Alan Purvis, Peter D. Manning, Ian Bowler, Durham Music Technology. Some observations on hierarchical, multiple-instruction-multiple-data computers |
| 215 | -- | 218 | V. Polo, F. Fernández, A. Sánchez. Parallel implementation of local averaging for image processing |
| 219 | -- | 222 | J. Carazo, S. Alexandres, J. Morán. Speech recognizer optimization and real-time implementation on a multitransputer array |
| 223 | -- | 226 | Edil S. T. Fernandes, Claudson F. Bornstein, Cláudia M. D. Pereira. Parallel code generation for super-scalar architectures |
| 227 | -- | 230 | Fernando M. B. Barbosa, Edil S. T. Fernandes. Dispatching simultaneous instructions |
| 231 | -- | 234 | P. A. Kokkinidis, C. Metaxaki-Kossionidou. An adaptive improvement of an image compression technique |
| 237 | -- | 242 | Helnye Azaria, Yuval Elovici, Roger D. Hersch. Multiple interfaces message passing system for transputer network |
| 243 | -- | 246 | R. McConnell, J. Flanigan. A simple switching system for transputer links |
| 247 | -- | 250 | Francisco Javier López Aligue, M. Isabel Acevedo Sotoca, Miguel A. Jaramillo Morán. Multimicrocomputer implementation of three-dimensional neural networks |
| 251 | -- | 254 | Francisco J. Vico, F. Sandoval. Neural networks definition algorithm |