Journal: Journal of Systems Architecture

Volume 37, Issue 1-5

0 -- 0Antonio Núñez, Don Fay. Letter from the short notes editors, Euromicro '92
3 -- 6Xiaoming Fan, Klaus Lagemann. Experiences and results in designing VLSI-chips using standard-cell techniques
7 -- 10Rainer Kress, Elmar U. K. Melcher, Reiner W. Hartenstein, Michel Dana. CMOS interconnect modelling for timing analysis
11 -- 14Jean-François Naviner, Jean-Claude Dufourd. Préforme/aGAPE: a synergy between symbolic cell design and assembly
15 -- 18C. W. Cheng, C. K. Li, P. K. Kung. A nonlinear 3D MOSFET table for VLSI circuit simulation
19 -- 22Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri. A delay insensitive approach to the VLSI design of a DRAM controller
23 -- 26A. Hernández, L. Gómez, A. Nunez. An empirical model to estimate power consumption in GaAs DCFL/SDCFL circuits
29 -- 32S. A. Rea, Peter Milligan, R. K. McConnell, L. A. Murphy, J. Pelan. An investigation of the performance characteristics of an i860 processor within a Meiko computing surface
33 -- 36Roger D. Hersch. Distributing pixmap images among parallel disk arrays
37 -- 40Dae-Wha Seo, Jung Wan Cho. Directory-based cache coherence scheme using number-balanced binary tree
41 -- 44Daniel Meziat, J. Sequeiros, J. Medina, S. Sánchez. CDPU for SOHO-CEPAC collaboration
45 -- 48Milivoje Aleksic, Mladena Novakovic, Aleksandar Car, Jelica Protic. CISC versus RISC processors for graphics: A simulation study
49 -- 54J. A. Montiel, Valentin de Armas, D. Q. M. Fay. An OCCAM circle generator program implemented in VLSI
57 -- 60D. E. Metafas, Spiridon Nikolaidis, Constantinos E. Goutis. Real time Cepstrum computation based on an Advanced CORDIC processor
61 -- 64Ferenc Vajda. Implementation issues of image texture analysis and segmentation
65 -- 68Peter Milligan, T. J. G. Benson, R. K. McConnell, A. Rea. Detecting components for parallel execution within the Mathematician's Devil
69 -- 72F. Moreno, S. Alexandres, J. Meneses. A flexible architecture for real-time speech recognition
73 -- 76P. J. Davey, T. Donnelly, D. J. Mapps. Pulse slimming in magnetic recording using digital signal processing techniques
77 -- 80Zdenek Blazek. Two-processor monitoring system for airplanes
81 -- 84Ignacio Aedo, Fivos Panetsos, A. Ribagorda. Hypertextual applications development tools
87 -- 90Xiaoming Fan. Analysis of multithreaded architectures - A case study
91 -- 94Krzysztof Kuchcinski. System level modelling and analysis of complex digital systems
95 -- 98Daniel Mozos, Julio Septién, Francisco Tirado, Milagros Fernández. Guidance for optimization-based synthesis tools
99 -- 103Dagung Lu, Prasenjit Biswas. An extended scheduling technique for software pipelining
105 -- 108Pedro P. Carballo, Roberto Sarmiento, Antonio Núñez. Integer and control units for a GaAs 32-bit RISC processor
111 -- 114Krista Rizman, Ivan Rozman. Facilitating composition and increasing object reusability by means of an event-driven object-oriented development
115 -- 118Haengrae Cho, Songchun Moon. CADTM: A database transaction manager for coordinating design activities in CAD environments
119 -- 122Haengrae Cho, Yoo-Sung Kim, Songchun Moon. Development of an autonomous heterogeneous distributed database system: DHIM
123 -- 126Marjeta Pucko, Monika Kapus-Kolar, Joze Rugelj. Developing multi-user interfaces for CSCW environment
127 -- 130Wojciech Cellary, Waldemar Wieczerzycki. On hierarchical locking of composite objects
133 -- 136Andreas Weininger. Source - A debugging tool for ParMod
137 -- 140Paul Sage, Peter Milligan, R. K. McConnell, S. Rea. Graph management within the Fortport migration environment (including comments on the use of objectstore)
141 -- 144R. K. McConnell, Paul Sage, S. A. Rea, P. J. P. McMullan. Hot spot analysis within the FortPort migration tool for parallel platforms
145 -- 148S. J. E. Taylor, Nasser Kalantery, Stephen C. Winter, Derek R. Wilson, A. P. Redfern. Developments in parallel discrete event simulation at the centre for parallel computing
149 -- 152M. S. Tudruj. Dynamically reconfigurable multi-transputer systems with serial bus control
153 -- 156Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri. Design of a massively parallel SIMD architecture for the Boltzmann machine
159 -- 162Rafael Dueire Lins, Bruno O. Lira. ΓCMC: Fast lazy functional languages
163 -- 166Rafael Dueire Lins, Patricia G. Soares. Some performance figures for the G-Machine and its optimisations
167 -- 170Petr Kroha. Translation of a query in OODBMS into a system of parallel tasks
171 -- 173K. W. Ng, C. K. Luk. The design of a multiparadigm programming language: I
175 -- 178Carol Britton, Martin Loomes, Richard Mitchell. Formal specifications as constructive diagrams
179 -- 182Andrea Clematis, Vittoria Gianuzzi. A hierarchical program structure for concurrent fault tolerant software
183 -- 186Juan López, Alfonso Gago. A parallel algorithm for the Jacobian matrix of a manipulator
187 -- 190Iztok Savnik, Tomaz Mohoric, Tomi Dolenc, Franc Novak. Modelling dynamic dependencies by functional database model
193 -- 196M. Svéda. Small area network interconnection
197 -- 200Arthur I. Karshmer, Renwei Yan. A CATV based metropolitan area network using distributed switching
201 -- 204Jelica Protic, Milivoje Aleksic. An example of the efficient message protocol for industrial LAN
205 -- 208Jan Janecek, Stefan Jedlik, Michal Meloun. Effectiveness of bridging in multiprotocol LANS
211 -- 214Gerd vom Bögel, K. Scherer, M. Bollerott. An optimized architecture for a rapid-prototype-emulator
215 -- 219Serafín Pérez, Enrique Mandado, Jacobo Ruiz de Ojeda. Logic controllers design methods using advanced PLDS
221 -- 224Ricardo O. Duarte, Edil S. T. Fernandes, Antonio C. Mesquita, Ana L. V. Azevedo. Configurable cells: Towards dynamic architectures