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    Journal: IEEE Micro

    Volume 10, Issue 6

    12 -- 15Pierre America, Ben J. A. Hulshof, Eddy Odijk, Frans Sijstermans, Rob A. H. van Twist, Rogier H. H. Wester. Parallel computers for advanced information processing
    16 -- 19Colin Whitby-Strevens. Transputers-past, present and future
    20 -- 23Guy Haworth, Steve Leunig, Carsten Hammer, Mike Reeve. The European Declarative System, database, and languages
    24 -- 27Peter Rounce, Jose Delgado. Architectures within the ESPRIT SPAN project
    28 -- 31Bernard Angéniol. Pygmalion: ESPRIT II project 2059, neurocomputing

    Volume 10, Issue 5

    5 -- 6David K. Kahaner. The Pax parallel computer
    14 -- 16Edward A. Lee. Programmable DSPs: a brief overview
    17 -- 27Henry Davis, Robert Fine, Denis Regimbal. Merging data converters and DSPs for mixed-signal processors
    28 -- 45Jeffery C. Bier, E. Goei, W. H. Ho, P. D. Lapsley, M. P. O'Reilly, Gilbert C. Sih, Edward A. Lee. Gabriel: a design environment for DSP
    46 -- 53Krishna A. Kumar, Brian Petrasko. Designing a custom DSP circuit using VHDL
    54 -- 62Rulph Chassaing, Wayne A. Peterson, Darrell W. Horning. A TMS320C25-based multirate filter
    63 -- 71Guido Albertengo, Riccardo Sisto. Parallel CRC generation
    73 -- 75F. X. Govers III, M. J. Pierson. On the edge-analysis of transactions and computers

    Volume 10, Issue 4

    10 -- 20Roger D. Chamberlain, Mark A. Franklin. Hierarchical discrete-event simulation on hypercube architectures
    21 -- 33Fadi N. Sibai, Karan L. Watson, Mi Lu. A parallel unification machine
    34 -- 40Michael Rumsey, John Sackett. An ASIC methodology for mixed analog-digital simulation
    41 -- 48A. J. van der Hoeven, Alfons A. J. de Lange, Ed F. Deprettere, Patrick M. Dewilde. A model for the high-level description and simulation of VLSI networks
    50 -- 61Kin-Hong Lee, Kwong-Sak Leung, Sin Man Cheang. A microprogrammable list processor for personal computers
    62 -- 74Yousif A. El-Imam, Karima Banat. Text-to-speech conversion on a personal computer

    Volume 10, Issue 3

    9 -- 21David V. James. Multiplexed buses: the endian wars continue
    22 -- 35Robin W. Edenfield, Michael G. Gallup, William Ledbetter Jr., Ralph McGarity, Eric E. Quintana, Russel A. Reininger. The 68040 processor. 2. Memory design and chip
    36 -- 47Merrick Darley, Bill Kronlage, Dvaid Bural, Bob Churchill, David Pulling, Paul Wang, Rick Iwamoto, Larry Yang. The TMS390C602A floating-point coprocessor for Sparc systems
    48 -- 66Mitch Alsup. Motorola's 88000 family architecture
    68 -- 75Takeshi Kitahara, Taizo Satoh. The Gmicro/300 32-bit microprocessor

    Volume 10, Issue 2

    5 -- 0J. Luu. Comments on 'A comparison of RISC architectures' by R.S. Piepho and W.S. Wu
    8 -- 11Richard H. Stern. Micro Law-software patents
    14 -- 25Hideto Hidaka, Yoshio Matsuda, Mikio Asakura, Kazuyasu Fujishima. The cache DRAM architecture: a DRAM with an on-chip cache memory
    26 -- 38Katsuyuki Kaneko, Masaitsu Nakajima, Yasuhiro Kakakura, Junji Nishikawa, Ichiro Okabayashi, Hiroshi Kadota. Processing element design for a parallel computer
    40 -- 55Yuji Hatano, Shinichiro Yano, Hiroyuki Mori, Hiroji Yamada, Mikio Hirano, Ushio Kawabe. A 4-bit, 250-MIPS processor using Josephson technology
    56 -- 69Hiraoki Kaneko, Nariko Suzuki, Hiroshi Wabuka, Koji Maemura. Realizing the V80 and its system support functions
    70 -- 85Milan Milenkovic. Microprocessor memory management units

    Volume 10, Issue 1

    10 -- 22Emil W. Brown, Anant Agrawal, Trevor Creary, Michael F. Klein, Dave Murata, Joseph Petolino. Implementing Sparc in ECL
    23 -- 26Stephen C. Johnson. Hot chips and soggy software
    27 -- 36Stephen C. Johnson. The i486 CPU: executing instructions in one clock cycle
    37 -- 43Thomas J. Pennello. Compiler challenges with RISCs
    44 -- 54Curtis R. Priem. Developing the GX graphics accelerator architecture
    55 -- 64Mark Birman, Allen Samuels, George Chu, Ting Chuk, Larry Hu, John McLeod, John Barnes. Developing the WTL3170/3171 Sparc floating-point coprocessors
    66 -- 78Robin W. Edenfield, Michael G. Gallup, William Ledbetter Jr., Ralph McGarity, Eric E. Quintana, Russel A. Reininger. The 68040 processor. I. Design and implementation
    79 -- 84Richard H. Stern. Appropriate and inappropriate legal protection of user interfaces and screen displays. V. How different forms of copyright protection interact with policy
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