Hiroshi Kadota - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 13 from 13

2011

Neurophysiological and Dynamical Control Principles Underlying Variable and Stereotyped Movement Patterns During Motor Skill AcquisitionKazutoshi Kudo, Makoto Miyazaki, Hirofumi Sekiguchi, Hiroshi Kadota, Shinya Fujii, Akito Miura, Michiko Yoshie, Hiroki Nakata. jaciii, 15(8):942-953, 2011. [doi]

2004

A new reconfigurable architecture with smart data-transfer subsystems for the intelligent image processingHiroshi Kadota, Yoshiaki Hori, Akiyoshi Wakatani. fpt 2004: 429-432 [doi]

Selective activation and deactivation of the human brain structures between speeded and precisely timed tapping responses to identical visual stimulus: an fMRI studyKazutoshi Kudo, Makoto Miyazaki, Toshitaka Kimura, Kentaro Yamanaka, Hiroshi Kadota, Masaya Hirashima, Yasoichi Nakajima, Kimitaka Nakazawa, Tatsuyuki Ohtsuki. neuroimage, 22(3):1291-1301, 2004. [doi]

2002

Classification of Rice Grain Using New Scale Invariant Zernike MomentsChong-Yaw Wee, Paramesran Raveendran, Fumiaki Takeda, Takeo Tsuzuki, Hiroshi Kadota, Satoshi Shimanouchi. jcis 2002: 832-835

Classification of rice grains using fuzzy artmap neural networkChong-Yaw Wee, R. Paramesran, Fumiaki Takeda, Takeo Tsuzuki, Hiroshi Kadota, Satoshi Shimanouchi. apccas 2002: 223-226 [doi]

2001

A New Inter-Core Built-In-Self-Test Circuits for Tri-State Buffers in the System on a ChipTetsuji Kishi, Mitsuyasu Ohta, Takashi Taniguchi, Hiroshi Kadota. ats 2001: 462 [doi]

1996

An evaluation of the subframe parallel approach for image clusteringAkiyoshi Wakatani, Yoshiteru Mino, Hiroshi Kadota. scjapan, 27(14):1-8, 1996. [doi]

1992

An 80-MFLOPS (peak) 64-b microprocessor for parallel computerHiraku Nakano, Masaitsu Nakajima, Yasuhiro Nakakura, Tadahiro Yoshida, Yoshiyuki Goi, Yuji Nakai, Reiji Segawa, Takeshi Kishida, Hiroshi Kadota. jssc, 27(3):365-372, March 1992. [doi]

1991

1990

Processing element design for a parallel computerKatsuyuki Kaneko, Masaitsu Nakajima, Yasuhiro Kakakura, Junji Nishikawa, Ichiro Okabayashi, Hiroshi Kadota. micro, 10(2):26-38, 1990. [doi]

1989

VLSI Parallel Computer with Data Transfer Network: ADENAHiroshi Kadota, Katsuyuki Kaneko, Yuji Tanikawa, Tatsuo Nogi. icpp 1989: 319-322

A VLSI RISC with 20-MFLOPS peak, 64-bit floating-point unitKatsuyuki Kaneko, Tadashi Okamoto, Masaitsu Nakajima, Yasuhiro Nakakura, Satoshi Gokita, Junji Nishikawa, Yuji Tanikawa, Hiroshi Kadota. jssc, 24(5):1331-1340, October 1989. [doi]

Sign in or sign up to see more results.

runs on WebDSL