Journal: IEEE Micro

Volume 29, Issue 6

2 -- 3Shane Greenstein. A Network of Platforms
5 -- 6Makoto Ikeda, Fumio Arakawa. Guest Editors' Introduction: Cool Chips
7 -- 17Tohru Nojiri, Yuki Kondo, Naohiko Irie, Masayuki Ito, Hajime Sasaki, Hideo Maejima. Domain Partitioning Technology for Embedded Multicore Processors
18 -- 27Motoki Kimura, Kenichi Iwata, Seiji Mochizuki, Hiroshi Ueda, Masakazu Ehama, Hiromi Watanabe. A Full HD Multistandard Video Codec for Mobile Applications
28 -- 43Joo-Young Kim 0001, Minsu Kim, Seungjin Lee 0001, Jinwook Oh, Sejong Oh, Hoi-Jun Yoo. Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-Aware Task Pipelining
44 -- 57Yuichi Hori, Yuya Hanai, Jun Nishimura, Tadahiro Kuroda. Architecture Design of Versatile Recognition Processor for Sensornet Applications
58 -- 67Takashi Komuro, Atsushi Iwashita, Masatoshi Ishikawa. A QVGA-Size Pixel-Parallel Image Processor for 1, 000-fps Vision
68 -- 71Sudhanva Gurumurthi. Architecting Storage for the Cloud Computing Era
72 -- 0Richard Stern. All Bilski Briefs Filed and Case Set for Oral Argument

Volume 29, Issue 5

2 -- 5David H. Albonesi. From the Editor in Chief: Welcome A-Board
6 -- 7Shane M. Greenstein. Micro Economics: Does Google Have Too Much Money?
8 -- 17José F. Martínez, Engin Ipek. Dynamic Multicore Resource Management: A Machine Learning Approach
18 -- 29Jason A. Poovey, Thomas M. Conte, Markus Levy, Shay Gal-On. A Benchmark Characterization of the EEMBC Benchmark Suite
30 -- 45Tran Nguyen Bao Anh, Su-Lim Tan. Real-Time Operating Systems for Small Microcontrollers
46 -- 55Hsiang-Ning Liu, Yu-Jen Huang, Jin-Fu Li. Memory Built-in Self Test in Multicore Chips with Mesh-Based Networks
56 -- 65Ying-Dar Lin, Po-Ching Lin, Yuan-Cheng Lai, Tai-Ying Liu. Hardware-Software Codesign for High-Speed Signature-based Virus Scanning
66 -- 68Richard Mateosian. Micro Review: Life and Work

Volume 29, Issue 4

2 -- 3Shane M. Greenstein. Micro Economics: Soccer Mom Messaging Is the Poetry of Our Age
5 -- 7Keren Bergman, Ron Brightwell, Fabrizio Petrini. Guest Editors Introduction: Hot Interconnects
8 -- 21Christopher Batten, Ajay Joshi, Jason Orcutt, Anatoly Khilo, Benjamin Moss, Charles Holzwarth, Milos Popovic, Hanqing Li, Henry I. Smith, Judy L. Hoyt, Franz X. Kärtner, Rajeev J. Ram, Vladimir Stojanovic, Krste Asanovic. Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics
22 -- 35Nikos Chrysos, Giorgos Dimitrakopoulos. Practical High-Throughput Crossbar Scheduling
36 -- 47John R. Feehrer, Paul Rotker, Milton Shih, Paul Gingras, Peter Yakutis, Stephen Phillips, John Heath. Coherency Hub Design for Multisocket Sun Servers with CoolThreads Technology
48 -- 61Tushar Krishna, Amit Kumar 0002, Li-Shiuan Peh, Jacob Postman, Patrick Chiang, Mattan Erez. Express Virtual Channels with Capacitively Driven Global Links
62 -- 73Michael R. T. Tan, Paul Rosenberg, Jong Souk Yeo, Moray McLaren, Sagi Mathai, Terry Morris, Huei Pei Kuo, Joseph Straznicky, Norman P. Jouppi, Shih-Yuan Wang. A High-Speed Optical Multidrop Bus for Computer Interconnections
74 -- 85Michele Petracca, Benjamin G. Lee, Keren Bergman, Luca P. Carloni. Photonic NoCs: System-Level Design Exploration
86 -- 0Richard H. Stern. Micro Law: An End to the Rambus Skullduggery Saga
87 -- 88Richard Mateosian. Micro Review: Twitter

Volume 29, Issue 3

4 -- 6Shane M. Greenstein. The Revolution in Spectrum Allocation
7 -- 9Markus Levy, Thomas M. Conte. Embedded Multicore Processors and Systems
10 -- 19Thomas B. Berg. Maintaining I/O Data Coherence in Embedded Multicore Systems
20 -- 30Jiang Xu, Wayne Wolf, Wei Zhang. Double-Data-Rate, Wave-Pipelined Interconnect for Asynchronous NoCs
31 -- 39Jean-Yves Mignolet, Rogier Baert, Thomas J. Ashby, Prabhat Avasare, Hye-On Jang, Jae Cheol Son. MPA: Parallelizing an Application onto a Multicore Platform Made Easy
40 -- 51Jim Holt, Anant Agarwal, Sven Brehmer, Max J. Domeika, Patrick Griffin, Frank Schirrmeister. Software Standards for the Multicore Era
52 -- 63Feng Wang, Mounir Hamdi. Memory Subsystems in High-End Routers
62 -- 64Richard Mateosian. Software Architects

Volume 29, Issue 2

2 -- 3Shane M. Greenstein. Building Broadband as Economic Stimulus
4 -- 5Christos Kozyrakis, Jan-Willem van de Waerdt. Guest Editors Introduction: Hot Chips Turns 20
6 -- 16Shailender Chaudhry, Robert Cypher, Magnus Ekman, Martin Karlsson, Anders Landin, Sherman Yip, HÃ¥kan Zeffer, Marc Tremblay. Rock: A High-Performance Sparc CMT Processor
17 -- 29Weiwu Hu, Jian Wang, Xiang Gao, Yunji Chen, Qi Liu, Guojie Li. Godson-3: A Scalable Multicore RISC Processor with x86 Emulation
30 -- 45Richard Selvaggi, Larry Pearlstein. Broadcom mediaDSP: A Platform for Building Programmable Multicore Video Processors
46 -- 53Dan Mansur. A New 40-nm FPGA and ASIC Common Platform
54 -- 63Lloyd Watts, Dana Massie, Allen Sansano, Jim Huey. Voice Processors Based on the Human Hearing System
64 -- 65Richard Stern. IEEE-USA Tells Congress that Patent Reform Is Essential to Economic Recovery
68 -- 71Richard Mateosian. No More Wishful Thinking

Volume 29, Issue 1

3 -- 5Shane M. Greenstein. Symptoms of Healthy Innovativeness
6 -- 9Joel S. Emer, Dean M. Tullsen. Guest Editors Introduction: Top Picks from the 2008 Computer Architecture Conferences
10 -- 21Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Pradeep Dubey, Stephen Junkins, Adam Lake, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Michael Abrash, Jeremy Sugerman, Pat Hanrahan. Larrabee: A Many-Core x86 Architecture for Visual Computing
22 -- 32Onur Mutlu, Thomas Moscibroda. Parallelism-Aware Batch Scheduling: Enabling High-Performance and Fair Shared Memory Controllers
33 -- 40John Kim, William J. Dally, Steve Scott, Dennis Abts. Cost-Efficient Dragonfly Topology for Large-Scale Systems
41 -- 49Kevin T. Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant D. Patel, Trevor N. Mudge, Steven K. Reinhardt. Server Designs for Warehouse-Computing Environments
50 -- 61Sudhanva Gurumurthi, Sriram Sankar, Mircea R. Stan. Using Intradisk Parallelism to Build Energy-Efficient Storage Systems
62 -- 72Shimin Chen, Michael Kozuch, Phillip B. Gibbons, Michael Ryan, Theodoros Strigkos, Todd C. Mowry, Olatunji Ruwase, Evangelos Vlachos, Babak Falsafi, Vijaya Ramachandran. Flexible Hardware Acceleration for Instruction-Grain Lifeguards
73 -- 83Brandon Lucia, Joseph Devietti, Luis Ceze, Karin Strauss. Atom-Aid: Detecting and Surviving Atomicity Violations
84 -- 95James Tuck, Wonsun Ahn, Josep Torrellas, Luis Ceze. SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization
96 -- 103Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad Khellah, Shih-Lien Lu. Trading Off Cache Capacity for Low-Voltage Operation
104 -- 115Renée St. Amant, Daniel A. Jiménez, Doug Burger. Mixed-Signal Approximate Computation: A Neural Predictor Case Study
116 -- 126Eren Kursun, Chen-Yong Cher. Temperature Variation Characterization and Thermal Management of Multicore Architectures
127 -- 138Xiaoyao Liang, Gu-Yeon Wei, David Brooks. Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
139 -- 143Richard H. Stern. One of the Last Updates on Rambus Standardization Skullduggery
144 -- 147Richard Mateosian. System Green