External Links

    Journal: IEEE Micro

    Volume 37, Issue 6

    4 -- 5Lieven Eeckhout. Moore's Law and Ultra-Low-Power Processors
    6 -- 12Srilatha Manne, Bryan Chin, Steven K. Reinhardt. If You Build It, Will They Come?
    13 -- 15Reetuparna Das. Blurring the Lines between Memory and Computation
    16 -- 19David Brooks, John Sartori. Ultra-Low-Power Processors
    20 -- 29Mark T. Bohr, Ian A. Young. CMOS Scaling Trends and Beyond
    30 -- 38Kyeongryeol Bong, Sungpill Choi, Changhyeon Kim, Hoi-Jun Yoo. Low-Power Convolutional Neural Network Processor for a Face-Recognition System
    40 -- 51Hasan Genc, Yazhou Zu, Ting-Wu Chin, Matthew Halpern, Vijay Janapa Reddi. Flying IoT: Toward Low-Power Vision in the Sky
    52 -- 61Vui Seng Chua, Julio Zamora-Esquivel, Anindya Sao Paul, Thawee Techathamnukool, Carlos Flores Fajardo, Nilesh Jain, Omesh Tickoo, Ravi Iyer. Visual IoT: Ultra-Low-Power Processing Architectures and Implications
    62 -- 71M. Hassan Najafi, Shiva Jamali-Zavareh, David J. Lilja, Marc D. Riedel, Kia Bazargan, Ramesh Harjani. An Overview of Time-Based Computing with Stochastic Constructs
    72 -- 89Kaiyuan Yang, David Blaauw, Dennis Sylvester. Hardware Designs for Security in Ultra-Low-Power IoT Systems: An Overview and Survey
    90 -- 91David Brooks. 2017 International Symposium on Computer Architecture Influential Paper Award
    92 -- 95Shane Greenstein. The Hush-Hush Norm

    Volume 37, Issue 5

    4 -- 5Lieven Eeckhout. From Cool Chips to Hot Interconnects
    6 -- 10Abhishek Bhattacharjee. Preserving Virtual Memory by Mitigating the Address Translation Wall
    11 -- 19Youchang Kim, Dongjoo Shin, Jinsu Lee, Hoi-Jun Yoo. BRAIN: A Low-Power Deep Search Engine for Autonomous Robots
    20 -- 31Davide Rossi, Antonio Pullini, Igor Loi, Michael Gautschi, Frank Kagan Gürkaynak, Adam Teman, Jeremy Constantin, Andreas Burg, Ivan Miro Panades, Edith Beigné, Fabien Clermidy, Philippe Flatresse, Luca Benini. Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster
    32 -- 42Makoto Miyamura, Toshitsugu Sakamoto, Xu Bai, Yukihide Tsuji, Ayuka Morioka, Ryusuke Nebashi, Munehiro Tada, Naoki Banno, Koichiro Okamoto, Noriyuki Iguchi, Hiromitsu Hada, Tadahiko Sugibayashi, Yuya Nagamatsu, Soichi Ookubo, Takuma Shirai, Fumihito Sugai, Masayuki Inaba. NanoBridge-Based FPGA in High-Temperature Environments
    44 -- 51Yuta Tokusashi, Hiroki Matsutani. Multilevel NoSQL Cache Combining In-NIC and In-Kernel Approaches
    52 -- 60Omer Arap, Lucas R. B. Brasilino, Ezra Kissel, Alexander Shroyer, Martin Swany. Offloading Collective Operations to Programmable Logic
    61 -- 69Richard H. Stern. FTC and Apple Sue Qualcomm for Cell Phone Standardization Skullduggery, Part 3: Determining SEP Reasonable Royalty
    70 -- 72Shane Greenstein. Insider Privileges

    Volume 37, Issue 4

    4 -- 5Lieven Eeckhout. Is Moore's Law Slowing Down? What's Next?
    6 -- 8Jeffrey S. Vetter, Erik P. DeBenedictis, Thomas M. Conte. Architectures for the Post-Moore Era
    10 -- 18Nam Sung Kim, Deming Chen, Jinjun Xiong, Wen-mei W. Hwu. Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era
    20 -- 28Roman Kaplan, Leonid Yavits, Ran Ginosar, Uri C. Weiser. A Resistive CAM Processing-in-Storage Architecture for DNA Sequence Alignment
    30 -- 38Tim Finkbeiner, Glen Hush, Troy Larsen, Perry Lea, John Leidel, Troy Manning. In-Memory Intelligence
    40 -- 50Lin Gan, Haohuan Fu, Wayne Luk, Chao Yang, Wei Xue, Guangwen Yang. Solving Mesoscale Atmospheric Dynamics Using a Reconfigurable Dataflow Architecture
    52 -- 62Craig LaBoda, Chris Dwyer, Alvin R. Lebeck. Exploiting Dark Fluorophore States to Implement Resonance Energy Transfer Pre-Charge Logic
    64 -- 71Scott M. Jackson, JoAnn M. Paul. Building Maze Solutions with Computational Dreaming
    72 -- 81Richard H. Stern. FTC and Apple Sue Qualcomm for Cell Phone Standardization Skullduggery, Part 2: Apple's Claims
    82 -- 84Shane Greenstein. Moore's Law and Economic Architectures

    Volume 37, Issue 3

    4 -- 5Lieven Eeckhout. Thoughts on the Top Picks Selections
    6 -- 11Aamer Jaleel, Moinuddin K. Qureshi. Top Picks from the 2016 Computer Architecture Conferences
    12 -- 21Yu-Hsin Chen, Joel S. Emer, Vivienne Sze. Using Dataflow to Optimize Energy Efficiency of Deep Neural Network Accelerators
    22 -- 29Mahdi Nazm Bojnordi, Engin Ipek. The Memristive Boltzmann Machines
    30 -- 38Yipeng Huang, Ning Guo, Mingoo Seok, Yannis P. Tsividis, Simha Sethumadhavan. Analog Computing in a Modern Context: A Linear Algebra Accelerator Case Study
    40 -- 50Tony Nowatzki, Vinay Gangadhar, Karthikeyan Sankaralingam, Greg Wright. Domain Specialization Is Generally Unnecessary for Accelerators
    52 -- 61Adrian M. Caulfield, Eric S. Chung, Andrew Putnam, Hari Angepat, Daniel Firestone, Jeremy Fowers, Michael Haselman, Stephen Heil, Matt Humphrey, Puneet Kaur, Joo-Young Kim, Daniel Lo, Todd Massengill, Kalin Ovtcharov, Michael Papamichael, Lisa Woods, Sitaram Lanka, Derek Chiou, Doug Burger. Configurable Clouds
    62 -- 69Moein Khazraee, Luis Vega Gutierrez, Ikuo Magaki, Michael Bedford Taylor. Specializing a Planet's Computation: ASIC Clouds
    70 -- 78Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis. DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric
    80 -- 86Jayneel Gandhi, Mark D. Hill, Michael M. Swift. Agile Paging for Efficient Memory Virtualization
    88 -- 97Daniel Lustig, Geet Sethi, Abhishek Bhattacharjee, Margaret Martonosi. Transistency Models: Memory Ordering at the Hardware-OS Interface
    98 -- 104James Bornholt, Randolph Lopez, Douglas M. Carmean, Luis Ceze, Georg Seelig, Karin Strauss. Toward a DNA-Based Archival Storage System
    106 -- 114Yazhou Zu, Wei Huang, Indrani Paul, Vijay Janapa Reddi. Ti-States: Power Management in Active Timing Margin Processors
    116 -- 125Alexei Colin, Graham Harvey, Alanson P. Sample, Brandon Lucia. An Energy-Aware Debugger for Intermittently Powered Systems
    126 -- 128Uri C. Weiser. Insights from the 2016 Eckert-Mauchly Award Recipient
    130 -- 131Shane Greenstein. Two Sides to Scale

    Volume 37, Issue 2

    4 -- 0Lieven Eeckhout. Hot Chips: Industry and Academia Cutting-Edge Microprocessors
    5 -- 6Bryan Chin, Subhasish Mitra. Hot Chips 28
    7 -- 17Denis Foley, John Danskin. Ultra-Performance Pascal GPU and NVLink Interconnect
    18 -- 25Kaiyuan Guo, Song Han, Song Yao, Yu Wang 0002, Yuan Xie 0001, Huazhong Yang. Software-Hardware Codesign for Efficient Neural Network Acceleration
    26 -- 39Nigel Stephens, Stuart Biles, Matthias Boettcher, Jacob Eapen, Mbou Eyole, Giacomo Gabrielli, Matt Horsnell, Grigorios Magklis, Alejandro Martinez, Nathanaël Prémillieu, Alastair Reid, Alejandro Rico, Paul Walker. The ARM Scalable Vector Extension
    40 -- 51Satish Kumar Sadasivam, Brian W. Thompto, Ronald N. Kalla, William J. Starke. IBM Power9 Processor Architecture
    52 -- 62Jack Doweck, Wen-Fu Kao, Allen Kuan-yu Lu, Julius Mandelblat, Anirudha Rahatekar, Lihu Rappoport, Efraim Rotem, Ahmad Yasin, Adi Yoaz. Inside 6th-Generation Intel Core: New Microarchitecture Code-Named Skylake
    63 -- 69Brent Bohnenstiehl, Aaron Stillmaker, Jon J. Pimentel, Timothy Andreas, Bin Liu, Anh Tran, Emmanuel Adeagbo, Bevan M. Baas. KiloCore: A Fine-Grained 1, 000-Processor Array for Task-Parallel Applications
    70 -- 80Michael McKeown, Yaosheng Fu, Tri M. Nguyen, Yanqi Zhou, Jonathan Balkind, Alexey Lavrov, Mohammad Shahrad, Samuel Payne, David Wentzlaff. Piton: A Manycore Processor for Multitenant Clouds
    81 -- 89Richard H. Stern. FTC and Apple Sue Qualcomm for Cell Phone Standardization Skullduggery: Part 1
    90 -- 103Stavros Volos, Djordje Jevdjic, Babak Falsafi, Boris Grot. Fat Caches for Scale-Out Servers
    104 -- 105Margaret Martonosi. 2016 Maurice Wilkes Award Given to Timothy Sherwood
    106 -- 107Shane Greenstein. The Value of Free in GDP

    Volume 37, Issue 1

    4 -- 5Lieven Eeckhout. Looking Forward to Upcoming Themes
    6 -- 7Pradip Bose, Alper Buyuktosunoglu. Architectural Support for Cognitive Processing
    8 -- 14James E. Smith. Research Agenda: Spacetime Computation and the Neocortex
    15 -- 21Yuhao Zhu, Vijay Janapa Reddi, Robert Adolf, Saketh Rama, Brandon Reagen, Gu-Yeon Wei, David M. Brooks. Cognitive Computing Safety: The New Horizon for Reliability / The Design and Evolution of Deep Learning Workloads
    22 -- 29Reza Yazdani, Albert Segura, Jose-Maria Arnau, Antonio Gonzalez. Low-Power Automatic Speech Recognition Through a Mobile GPU and a Viterbi Accelerator
    30 -- 40Masab Ahmad, Chris J. Michael, Omer Khan. Efficient Situational Scheduling of Graph Workloads on Single-Chip Multicores and GPUs
    42 -- 51Muhammet Mustafa Ozdal, Serif Yesil, Taemin Kim, Andrey Ayupov, John Greth, Steven M. Burns, Ozcan Ozturk. Graph Analytics Accelerators for Cognitive Systems
    52 -- 59Mateja Putic, A. J. Varshneya, Mircea R. Stan. Hierarchical Temporal Memory on the Automata Processor
    60 -- 72Babak Falsafi, Bill Dally, Desh Singh, Derek Chiou, Joshua J. Yi, Resit Sendag. FPGAs versus GPUs in Data centers
    74 -- 76Richard Mateosian. Resistance Is Futile
    78 -- 79Shane Greenstein. Technology Policy and the Trump Administration
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