Journal: SIGARCH Computer Architecture News

Volume 22, Issue 5

3 -- 10Martti J. Forsell. Are multiport memories physically feasible?
11 -- 18Rok Sosic. History cache: hardware support for reverse execution
19 -- 26Mark D. Hill, James R. Larus, David A. Wood. The Wisconsin Wind Tunnel project: an annotated bibliography
27 -- 29Avijit Saha, Nadeem Malik. Distributed directory tags
30 -- 40Ishaq H. Unwala, Harvey G. Cragon. A study of MIPS programs
41 -- 46Mark Thorson. Internet Nuggets
49 -- 55Kenneth R. Ohnemus, Diana F. Mallin. Benefits of implementing on-line methods and procedures
56 -- 60Daniel K. Cunningham, Steven J. Reilly. Leading the design team - the evolution of the technical writer from a support role to a design role
61 -- 65Ann Rockley. Multimedia: towards an electronic performance support system
66 -- 75Katherine E. Drew. Telecommunicators and telecommuters: making multiple-site documentation projects work

Volume 22, Issue 4

3 -- 4Ravi Jain, John Werth, James C. Browne. Special Issue on Input/Output in Parallel Computer Systems: Introduction
5 -- 10Sandra Johnson Baylor, Caroline Benveniste, Yarsun Hsu. Performance evaluation of a massively parallel I/O subsystem
11 -- 16James B. Sinclair, Jay Tang, Peter J. Varman. Instability in parallel I/O systems
17 -- 22Steven H. Vanderleest, Ravishankar K. Iyer. Measurement of I/O bus contention and correlation among heterogeneous device types in a single-bus multiprocessor system
23 -- 28Rajeev Thakur, Rajesh Bordawekar, Alok N. Choudhary. Compilation of out-of-core data parallel programs for distributed memory machines
29 -- 34Abhaya Asthana, Mark Cravatts, Paul Krzyzanowski. An experimental active memory based I/O subsystem
35 -- 40Dannie Durand, Ravi Jain, David Tseytlin. Distributed scheduling algorithms to improve the performance of parallel data transfers
41 -- 46Haruo Yokota. DR-nets: data-reconstruction networks for highly reliable parallel-disk systems
47 -- 54Martti J. Forsell. Are multiport memories physically feasible?
55 -- 59Ghulam Chaudhry, Xuechang Li. A case for the multithreaded processor architecture
60 -- 70Yin Chan, Ashok Sudarsanam, Andrew Wolfe. The effect of compiler-flag tuning on SPEC benchmark performance
71 -- 77Jin Ho Lee, Min-Young Lee, Seong-Uk Choi, Myong-Soon Park. Reducing cache conflicts in data cache prefetching
78 -- 81Mark Thorson. Usenet Nuggets

Volume 22, Issue 3

3 -- 13John R. Gurd. Supercomputing: big bang or steady state growth?
14 -- 18Kay P. Litchfield. Instruction execution sequence confirmation
19 -- 26Phil Allen, Franc Brglez, Hal Carter, Robert Caverly, Jerry Dillion, Albert Lo, Ron Lomax, John Oldfield, Cesar Pina, T. J. Wilkinson. Report of the 1993 workshop on rapid prototyping of microelectronic systems for universities
27 -- 28Mark Thorson. Usenet Nuggets
29 -- 30Ewerton Longoni Madruga. Book Review: Internetworking with TCP/IP vol. III: Client-Server programming and applications (BSD Sockets version) by Douglas E. Comer and David L. Stevens (Prentice-Hall, 1993)

Volume 22, Issue 1

3 -- 18Robert A. Iannucci, Anant Agarwal, Bill Dally, Anoop Gupta, Greg Papadopoulos, Burton J. Smith. Architectural and implementation issues for multithreading (panel session I)
19 -- 33Burt Halstead, David Callahan, Jack Dennis, R. S. Nikhil, Vivek Sarkar. Programming, compilation, and resource management issues for multithreading (panel session II)
34 -- 43Henry G. Baker. Linear logic and permutation stacks - the Forth shall be first
44 -- 51Abraham Mendlson, Shlomit S. Pinter, Ruth Shtokhamer. Compile time instruction cache optimizations
52 -- 58David R. Barach, Jaspal Kohli, John Slice, Marc Spaulding, Rajeev Bharadhwaj, Don Hudson, Cliff Neighbors, Nirmal R. Saxena, Rolland Crunk. HALSIM - a very fast SPARC V9 behavioral model
59 -- 60Mark Thorson. Usenet Nuggets
60 -- 61Ewerton Longoni Madruga. Book Review: SNMP, SNMPv2, and CMIP: The Practical Guide to Network Management Standards by William Stallings: (Addison-Wesley Publishing Company Inc. 1993)