| 3 | -- | 8 | Chiharu Tsuruta, Yohei Miki, Takuya Kuhara, Hideharu Amano, Masayuki Umemura. Off-Loading LET Generation to PEACH2: A Switching Hub for High Performance GPU Clusters |
| 9 | -- | 14 | Koji Okina, Rie Soejima, Kota Fukumoto, Yuichiro Shibata, Kiyoshi Oguri. Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization |
| 15 | -- | 21 | Ahmad Lashgar, Ebad Salehi, Amirali Baniasadi. A Case Study in Reverse Engineering GPGPUs: Outstanding Memory Handling Resources |
| 22 | -- | 27 | Ami Hayashi, Yuta Tokusashi, Hiroki Matsutani. A Line Rate Outlier Filtering FPGA NIC using 10GbE Interface |
| 28 | -- | 33 | Abhishek Kumar Jain, Xiangwei Li, Suhaib A. Fahmy, Douglas L. Maskell. Adapting the DySER Architecture with DSP Blocks as an Overlay for the Xilinx Zynq |
| 34 | -- | 39 | David de la Chevallerie, Jens Korinth, Andreas Koch 0001. ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators |
| 40 | -- | 45 | Soukaina N. Hmid, José Gabriel F. Coutinho, Wayne Luk. A Transfer-Aware Runtime System for Heterogeneous Asynchronous Parallel Execution |
| 46 | -- | 51 | Ahmed Al-Wattar, Shawki Areibi, Gary William Grewal. Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework |
| 52 | -- | 57 | Amir Momeni, Hamed Tabkhi, Yash Ukidave, Gunar Schirner, David R. Kaeli. Exploring the Efficiency of the OpenCL Pipe Semantic on an FPGA |
| 58 | -- | 63 | Takuji Mitsuishi, Jun Suzuki, Yuki Hayashi, Masaki Kan, Hideharu Amano. Breadth First Search on Cost-efficient Multi-GPU Systems |
| 64 | -- | 69 | Michael Mefenza, Nicolas Edwards, Christophe Bobda. Interface Based Memory Synthesis of Image Processing Applications in FPGA |
| 70 | -- | 75 | Da Tong, Viktor K. Prasanna. High Throughput Sketch Based Online Heavy Hitter Detection on FPGA |
| 76 | -- | 81 | Xinying Wang, Phillip H. Jones, Joseph Zambreno. A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns |
| 82 | -- | 87 | Kentaro Sano, Fumiya Kono, Naohito Nakasato, Alexander Vazhenin, Stanislav Sedukhin. Stream Computation of Shallow Water Equation Solver for FPGA-based 1D Tsunami Simulation |
| 86 | -- | 93 | Liucheng Guo, Andreea-Ingrid Funie, David B. Thomas, Haohuan Fu, Wayne Luk. Parallel Genetic Algorithms on Multiple FPGAs |
| 94 | -- | 100 | Mark Thorson. Internet Nuggets |