Journal: IEEE Transactions on Computers

Volume 44, Issue 3

353 -- 370Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu. The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors
371 -- 382Dipanwita Roy Chowdhury, Indranil Sengupta, Parimal Pal Chaudhuri. CA-Based Byte Error-Correcting Code
383 -- 393Mark G. Karpovsky, Tatyana D. Roziner, Claudio Moraga. Fault Detection in Multiprocessor Systems and Array Processors
394 -- 407Sedat Akyürek, Kenneth Salem. Management of Partially Safe Buffers
408 -- 418Nicholas S. Bowen, Dhiraj K. Pradhan. A Fault Tolerant Hybrid Memory Structure and Memory Management Algorithms
419 -- 433Arif Merchant, Philip S. Yu. Analytic Modeling and Comparisons of Striping Strategies for Replicated Disk Arrays
434 -- 447Debashis Bhattacharya, Prathima Agrawal, Vishwani D. Agrawal. Test Generation for Path Delay Faults Using Binary Decision Diagrams
448 -- 453Hasan Cam, José A. B. Fortes. A Fast VLSI-Efficient Self-Routing Permutation Network
453 -- 457Weng-Fai Wong, Eiichi Goto. Fast Evaluation of the Elementary Functions in Single Precision
458 -- 462Daniel C. McCrackin. Practical Delay Enforced Multistream (DEMUS) Control of Deeply Pipelined Processors
462 -- 466Sampath Rangarajan, Yennun Huang, Satish K. Tripathi. Computing Reliability Intervals for k-Resilient Protocols
466 -- 471Wei Kuan Shih, Jane W.-S. Liu. Algorithms for Scheduling Imprecise Computations with Timing Constraints to Minimize Maximum Error
471 -- 479Richard Gerber, William Pugh, Manas Saksena. Parametric Dispatching of Hard Real-Time Tasks